diff options
| author | Stefan Reinauer <stepan@openbios.org> | 2005-08-06 22:37:26 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2005-08-06 22:37:26 +0000 |
| commit | ce8cba4d046492e5423e4d247045bec206b63716 (patch) | |
| tree | 06089e461e4afc80eff80ffc75fd37e8dca69050 /src/mainboard/technologic/ts5300/Config.lb | |
| parent | 0c6c07348f0ce1438e2dddb3a7821fa7bd932bfe (diff) | |
| download | coreboot-ce8cba4d046492e5423e4d247045bec206b63716.tar.xz | |
reclone ts5300 from digitallogic sc520 board
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1997 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/technologic/ts5300/Config.lb')
| -rw-r--r-- | src/mainboard/technologic/ts5300/Config.lb | 38 |
1 files changed, 15 insertions, 23 deletions
diff --git a/src/mainboard/technologic/ts5300/Config.lb b/src/mainboard/technologic/ts5300/Config.lb index 665a23aa0a..04cc7f2d7b 100644 --- a/src/mainboard/technologic/ts5300/Config.lb +++ b/src/mainboard/technologic/ts5300/Config.lb @@ -2,8 +2,10 @@ ## Compute the location and size of where this firmware image ## (linuxBIOS plus bootloader) will live in the boot rom chip. ## +default ROM_SIZE = 512 * 1024 +default FALLBACK_SIZE = 0x10000 if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE + default ROM_SECTION_SIZE = 64 * 1024 # FALLBACK_SIZE default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) else default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) @@ -14,8 +16,8 @@ end ## Compute the start location and size size of ## The linuxBIOS bootloader. ## -default CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) +default CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) ## ## Compute where this copy of linuxBIOS will start in the boot rom @@ -29,7 +31,7 @@ default _ROMBASE = ( CONFIG_ROM_STREAM_START + PAYLOAD_SIZE ) ## XIP_ROM_SIZE must be a power of 2. ## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE ## -default XIP_ROM_SIZE=65536 +default XIP_ROM_SIZE=32*1024 default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) ## @@ -44,7 +46,7 @@ arch i386 end driver mainboard.o if HAVE_PIRQ_TABLE object irq_tables.o end -#object reset.o +object reset.o ## ## Romcc output @@ -61,11 +63,11 @@ end makerule ./auto.E depends "$(MAINBOARD)/auto.c option_table.h ./romcc" - action "./romcc -E -mcpu=c3 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" + action "./romcc -E -mcpu=i386 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end makerule ./auto.inc depends "$(MAINBOARD)/auto.c option_table.h ./romcc" - action "./romcc -mcpu=c3 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" + action "./romcc -mcpu=i386 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end ## @@ -114,9 +116,7 @@ end ## Setup RAM ## mainboardinit cpu/x86/fpu/enable_fpu.inc -mainboardinit cpu/x86/mmx/enable_mmx.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc ## ## Include the secondary Configuration files @@ -124,19 +124,11 @@ mainboardinit cpu/x86/mmx/disable_mmx.inc dir /pc80 config chip.h -chip northbridge/amd/sc520 - device pci_domain 0 on - device pci 0.0 on -#chip southbridge/amd/sc520 -# register "enable_usb" = "0" -# register "enable_native_ide" = "1" -# register "enable_com_ports" = "1" -# register "enable_keyboard" = "0" -# register "enable_nvram" = "1" -# end - end - chip cpu/amd/sc520 - end - end +chip cpu/amd/sc520 + device pci_domain 0 on + device pci 0.0 on end + device pci 1.0 on end +# register "com1" = "{1}" +# register "com1" = "{1, 0, 0x3f8, 4}" + end end - |