diff options
| author | Martin Roth <gaumless@gmail.com> | 2017-10-15 15:14:38 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-01-15 23:25:26 +0000 |
| commit | 0a19b080ef03ba50d111bd966c45ca90cf1507d6 (patch) | |
| tree | b047d42cd509f584d759ab2cac01457e150f5d54 /src/mainboard/thomson/ip1000/devicetree.cb | |
| parent | 264566c177dac98e67c2a4765fe08c5d8de10753 (diff) | |
| download | coreboot-0a19b080ef03ba50d111bd966c45ca90cf1507d6.tar.xz | |
Intel i82830 boards & chips: Remove - using LATE_CBMEM_INIT
All boards and chips that are still using LATE_CBMEM_INIT are being
removed as previously discussed.
If these boards and chips are updated to not use LATE_CBMEM_INIT, they
can be restored to the active codebase from the 4.7 branch.
chips:
cpu/intel/socket_mFCBGA479
northbridge/intel/i82830
Mainboards:
mainboard/rca/rm4100
mainboard/thomson/ip1000
Change-Id: I9574179516c30bb0d6a29741254293c2cc6f12e9
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/22032
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/thomson/ip1000/devicetree.cb')
| -rw-r--r-- | src/mainboard/thomson/ip1000/devicetree.cb | 68 |
1 files changed, 0 insertions, 68 deletions
diff --git a/src/mainboard/thomson/ip1000/devicetree.cb b/src/mainboard/thomson/ip1000/devicetree.cb deleted file mode 100644 index 2f8903eaae..0000000000 --- a/src/mainboard/thomson/ip1000/devicetree.cb +++ /dev/null @@ -1,68 +0,0 @@ -chip northbridge/intel/i82830 # Northbridge - device cpu_cluster 0 on # APIC cluster - chip cpu/intel/socket_mFCBGA479 # Low Voltage PIII Micro-FCBGA Socket 479 - device lapic 0 on end # APIC - end - end - - device domain 0 on # PCI domain - device pci 0.0 on end # Host bridge - device pci 2.0 on end # VGA (Intel 82830 CGC) - chip southbridge/intel/i82801dx # Southbridge - register "pirqa_routing" = "0x05" - register "pirqb_routing" = "0x06" - register "pirqc_routing" = "0x07" - register "pirqd_routing" = "0x09" - register "pirqe_routing" = "0x0a" - register "pirqf_routing" = "0x80" - register "pirqg_routing" = "0x80" - register "pirqh_routing" = "0x0b" - - register "ide0_enable" = "1" - register "ide1_enable" = "1" - - device pci 1d.0 on end # USB UHCI Controller #1 - device pci 1d.1 on end # USB UHCI Controller #2 - device pci 1d.2 on end # USB UHCI Controller #3 - device pci 1d.7 on end # USB2 EHCI Controller - device pci 1e.0 on end # PCI bridge - device pci 1f.0 on # ISA/LPC bridge - chip superio/smsc/smscsuperio # Super I/O - device pnp 2e.0 off # Floppy - io 0x60 = 0x3f0 - irq 0x70 = 6 - drq 0x74 = 2 - end - device pnp 2e.3 on # Parallel port - io 0x60 = 0x378 - irq 0x70 = 7 - drq 0x74 = 4 - end - device pnp 2e.4 on # Com1 - io 0x60 = 0x3f8 - irq 0x70 = 4 - end - device pnp 2e.5 on # Com2 / IR - io 0x60 = 0x2f8 - irq 0x70 = 3 - end - device pnp 2e.7 on # PS/2 keyboard/mouse - io 0x60 = 0x60 - io 0x62 = 0x64 - irq 0x70 = 1 # Keyboard interrupt - irq 0x72 = 12 # Mouse interrupt - end - device pnp 2e.9 off end # Game port - device pnp 2e.a on # PME - io 0x60 = 0x800 - end - device pnp 2e.b off end # MPU-401 - end - end - device pci 1f.1 on end # IDE - device pci 1f.3 on end # SMBus - device pci 1f.5 on end # AC'97 audio - device pci 1f.6 off end # AC'97 modem - end - end -end |