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| author | Stefan Reinauer <reinauer@chromium.org> | 2013-02-12 15:20:54 -0800 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-02-14 07:07:20 +0100 |
| commit | 0aa37c488bf785466e0db9897805ebf287af48eb (patch) | |
| tree | bbbdb3fd2cd6e9972d44df79e5c1232ba1928111 /src/mainboard/thomson/ip1000 | |
| parent | 398e84c71a15b7db8c631bb5b17d1a1a60c91128 (diff) | |
| download | coreboot-0aa37c488bf785466e0db9897805ebf287af48eb.tar.xz | |
sconfig: rename lapic_cluster -> cpu_cluster
The name lapic_cluster is a bit misleading, since the construct is not local
APIC specific by concept. As implementations and hardware change, be more
generic about our naming. This will allow us to support non-x86 systems without
adding new keywords.
Change-Id: Icd7f5fcf6f54d242eabb5e14ee151eec8d6cceb1
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/2377
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/thomson/ip1000')
| -rw-r--r-- | src/mainboard/thomson/ip1000/devicetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/thomson/ip1000/devicetree.cb b/src/mainboard/thomson/ip1000/devicetree.cb index c1733303fa..167ada0912 100644 --- a/src/mainboard/thomson/ip1000/devicetree.cb +++ b/src/mainboard/thomson/ip1000/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/intel/i82830 # Northbridge - device lapic_cluster 0 on # APIC cluster + device cpu_cluster 0 on # APIC cluster chip cpu/intel/socket_mFCBGA479 # Low Voltage PIII Micro-FCBGA Socket 479 device lapic 0 on end # APIC end |