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| author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-06-02 07:58:14 +1000 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-06-03 09:37:57 +0200 |
| commit | fdceb48b3623f8d342c9138feb8ee0db61a79f24 (patch) | |
| tree | 441eaaf1b64d13ed6f7eea4fd58a2b8761514c60 /src/mainboard/thomson | |
| parent | 8f45761a67347050058537f6a6cd75489af6c1d8 (diff) | |
| download | coreboot-fdceb48b3623f8d342c9138feb8ee0db61a79f24.tar.xz | |
superio/smsc/smscsuperio: Make romstage linkable with header
Rewrite smsc/smscsuperio romstage component to be more consistent and
provide header there-by removing #include's of early_serial.c's in
mainboard's.
Change-Id: I572e0c76422f09d4de88935a36c0a59e5350e6e0
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5915
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/thomson')
| -rw-r--r-- | src/mainboard/thomson/ip1000/romstage.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/thomson/ip1000/romstage.c b/src/mainboard/thomson/ip1000/romstage.c index 30ea8bdb2e..77255e7b10 100644 --- a/src/mainboard/thomson/ip1000/romstage.c +++ b/src/mainboard/thomson/ip1000/romstage.c @@ -27,7 +27,7 @@ #include "drivers/pc80/udelay_io.c" #include <console/console.h> #include <lib.h> -#include "superio/smsc/smscsuperio/early_serial.c" +#include <superio/smsc/smscsuperio/smscsuperio.h> #include "northbridge/intel/i82830/raminit.h" #include "northbridge/intel/i82830/memory_initialized.c" #include "southbridge/intel/i82801dx/i82801dx.h" |