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| author | Greg Watson <jarrah@users.sourceforge.net> | 2004-06-03 16:56:01 +0000 |
|---|---|---|
| committer | Greg Watson <jarrah@users.sourceforge.net> | 2004-06-03 16:56:01 +0000 |
| commit | 2906362ea7001da74b92339fa7f3fa146f05f919 (patch) | |
| tree | 8af299659671863fce49f80a787f5f7b31873611 /src/mainboard/totalimpact/briq | |
| parent | 5b2565a6df7d9f8f9b6354be797ee926586618af (diff) | |
| download | coreboot-2906362ea7001da74b92339fa7f3fa146f05f919.tar.xz | |
nothing yet
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1597 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/totalimpact/briq')
| -rw-r--r-- | src/mainboard/totalimpact/briq/init.c | 41 |
1 files changed, 0 insertions, 41 deletions
diff --git a/src/mainboard/totalimpact/briq/init.c b/src/mainboard/totalimpact/briq/init.c index b7da78eba4..10de036055 100644 --- a/src/mainboard/totalimpact/briq/init.c +++ b/src/mainboard/totalimpact/briq/init.c @@ -22,53 +22,12 @@ /* * Do very early board initialization: - * - * - Configure External Bus (EBC) - * - Setup Flash - * - Setup NVRTC - * - Setup Board Control and Status Registers (BCSR) - * - Enable UART0 for debugging */ #include <ppc_asm.tmpl> #include <ppc.h> -#include <ppc4xx.h> -#include <arch/io.h> -#include <timer.h> void board_init(void) { - /* - * Configure FLASH - */ - mtebc(pb0cr, 0xFC0DC000); - mtebc(pb0ap, 0x02000000); - - /* - * Configure NVTRC/BCSR - */ - mtebc(pb4cr, 0xF4058000); - mtebc(pb4ap, 0x04050000); - - /* - * Enable PCI - */ - outb(0x80, 0xF4000001); - - /* - * Enable UART0 - */ - outb(0x20, 0xF4000003); - - /* - * Cycle LEDs to show something is happening... - */ - outb(0x07, 0xF4000009); - udelay(100000); - outb(0x0B, 0xF4000009); - udelay(100000); - outb(0x0D, 0xF4000009); - udelay(100000); - outb(0x0E, 0xF4000009); } |