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| author | Uwe Hermann <uwe@hermann-uwe.de> | 2007-05-27 23:31:31 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2007-05-27 23:31:31 +0000 |
| commit | f5a6fd253c3d289bd70917504f59255038d476a2 (patch) | |
| tree | be34e80d352c657bd5ed4e11d8e82fd2f16f829c /src/mainboard/tyan/s1846/Options.lb | |
| parent | 4cb85533dd14731048b65d8f2e165a271b98953e (diff) | |
| download | coreboot-f5a6fd253c3d289bd70917504f59255038d476a2.tar.xz | |
Various 440BX and Tyan S1846 related minor changes and fixes (trivial):
- Only check the RAM from 0 - 640 KB and 768 KB - 1 MB now. That's
available on all boards, regardless of what DIMMs you use.
Tested on the Tyan S1846, works fine.
- Properly set the PAM registers to allow the region from 768 KB - 1 MB
to be used as normal RAM (required for the above).
- Document all of this properly. Add/improve other documentation, too.
- Simplify and document code in northbridge.c.
- Cosmetics and coding style.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2701 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s1846/Options.lb')
| -rw-r--r-- | src/mainboard/tyan/s1846/Options.lb | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/tyan/s1846/Options.lb b/src/mainboard/tyan/s1846/Options.lb index 896a49d940..1ce855231e 100644 --- a/src/mainboard/tyan/s1846/Options.lb +++ b/src/mainboard/tyan/s1846/Options.lb @@ -60,7 +60,6 @@ default HAVE_HARD_RESET=0 ## default HAVE_PIRQ_TABLE=0 default IRQ_SLOT_COUNT=4 -#object irq_tables.o ## ## Build code to export a CMOS option table |