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author | Eric Biederman <ebiederm@xmission.com> | 2004-10-21 10:44:08 +0000 |
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committer | Eric Biederman <ebiederm@xmission.com> | 2004-10-21 10:44:08 +0000 |
commit | dbec2d4090e40d1d8e1fd06e8d4180d3fa685d4d (patch) | |
tree | e813d3f9dea80d35cbc29d6bf35995fec0a06ab9 /src/mainboard/tyan/s2735/Config.lb | |
parent | f3aa4707d3bef9f529a70a204dbc648968cf7c20 (diff) | |
download | coreboot-dbec2d4090e40d1d8e1fd06e8d4180d3fa685d4d.tar.xz |
- Bump the LinuxBIOS major version
- Rename chip_config chip_operations throughout the tree
- Fix Config.lb on most of the Opteron Ports
- Fix the amd 8000 chipset support for setting the subsystem vendor and device ids
- Add detection of devices that are on the motherboard (i.e. In Config.lb)
- Baby step in getting the resource limit handling correct, Ignore fixed resources
- Only call enable_childrens_resources on devices we know will have children
For some busses like i2c it is non-sense and we don't want it.
- Set the resource limits for pnp devices resources.
- Improve the resource size detection for pnp devices.
- Added a configuration register to amd8111_ide.c so we can enable/disable individual ide channels
- Added a header file to hold the prototype of isa_dma_init
- Fixed most of the superio chips so the should work now, the via superio pci device is the exception.
- The code compiles and runs so it is time for me to go to bed.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1698 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s2735/Config.lb')
-rw-r--r-- | src/mainboard/tyan/s2735/Config.lb | 136 |
1 files changed, 72 insertions, 64 deletions
diff --git a/src/mainboard/tyan/s2735/Config.lb b/src/mainboard/tyan/s2735/Config.lb index 2b94689ba6..a5de70ba1b 100644 --- a/src/mainboard/tyan/s2735/Config.lb +++ b/src/mainboard/tyan/s2735/Config.lb @@ -152,71 +152,79 @@ mainboardinit cpu/p6/disable_mmx_sse.inc config chip.h -northbridge intel/e7501 "e7501" - pci 0:2.0 - pci 0:0.0 - pci 0:0.1 - pci 0:6.0 - southbridge intel/i82870 "i82870" - pci 0:1c.0 - pci 0:1d.0 - pci 0:1e.0 - pci 0:1f.0 +chip northbridge/intel/e7501 + device pci_domain 0 + device pci 0.0 on end + device pci 0.1 on end + device pci 2.0 on + chip southbridge/intel/i82870 + device pci 1c.0 + device pci 1d.0 + device pci 1e.0 + device pci 1f.0 + end + end + device pci 6.0 on end + chip southbridge/intel/i82801er + device pci 1d.0 on end + device pci 1d.1 on end + device pci 1d.2 on end + device pci 1d.3 on end + device pci 1d.7 on end + device pci 1e.0 on end + device pci 1f.0 on + # device pci 8.0 end + chip winbond/w83627hf + device pnp 2e.0 on # Floppy + io 0x60 = 0x3f0 + irq 0x70 = 6 + drq 0x74 = 2 + end + device pnp 2e.1 off # Parallel Port + io 0x60 = 0x378 + irq 0x70 = 7 + end + device pnp 2e.2 on # Com1 + io 0x60 = 0x3f8 + irq 0x70 = 4 + end + device pnp 2e.3 off # Com2 + io 0x60 = 0x2f8 + irq 0x70 = 3 + end + device pnp 2e.5 on # Keyboard + io 0x60 = 0x60 + io 0x62 = 0x64 + irq 0x70 = 1 + irq 0x72 = 12 + end + device pnp 2e.6 off end # CIR + device pnp 2e.7 off end # GAME_MIDI_GIPO1 + device pnp 2e.8 off end # GPIO2 + device pnp 2e.9 off end # GPIO3 + device pnp 2e.a off end # ACPI + device pnp 2e.b on # HW Monitor + io 0x60 = 0x290 + end + end + end + device pci 1f.1 off end + device pci 1f.2 on end + device pci 1f.3 on end + device pci 1f.5 off end + device pci 1f.6 off end + + end + end + device apic_cluster 0 + chip cpu/intel/socket_mPGA604_533Mhz + apic 0 + end + chip cpu/intel/socket_mPGA604_533Mhz + apic 6 + end end end - southbridge intel/i82801er "i82801er" - pci 0:1f.0 - pci 0:1d.0 on - pci 0:1d.1 on - pci 0:1d.2 on - pci 0:1d.3 on - pci 0:1d.7 on - pci 0:1e.0 on - pci 0:1f.1 off - pci 0:1f.2 on - pci 0:1f.3 on - pci 0:1f.5 off - pci 0:1f.6 off -# pci 1:8.0 off - superio winbond/w83627hf - pnp 2e.0 on # Floppy - io 0x60 = 0x3f0 - irq 0x70 = 6 - drq 0x74 = 2 - pnp 2e.1 off # Parallel Port - io 0x60 = 0x378 - irq 0x70 = 7 - pnp 2e.2 on # Com1 - io 0x60 = 0x3f8 - irq 0x70 = 4 - pnp 2e.3 off # Com2 - io 0x60 = 0x2f8 - irq 0x70 = 3 - pnp 2e.5 on # Keyboard - io 0x60 = 0x60 - io 0x62 = 0x64 - irq 0x70 = 1 - irq 0x72 = 12 - pnp 2e.6 off # CIR - pnp 2e.7 off # GAME_MIDI_GIPO1 - pnp 2e.8 off # GPIO2 - pnp 2e.9 off # GPIO3 - pnp 2e.a off # ACPI - pnp 2e.b on # HW Monitor - io 0x60 = 0x290 - end - end -#end + dir /pc80 #dir /bioscall -cpu p6 "cpu0" -end - -cpu p6 "cpu1" -end - -cpu p6 "cpu2" -end - -cpu p6 "cpu3" -end |