summaryrefslogtreecommitdiff
path: root/src/mainboard/tyan/s2850
diff options
context:
space:
mode:
authorYinghai Lu <yinghailu@gmail.com>2006-04-03 20:38:34 +0000
committerYinghai Lu <yinghailu@gmail.com>2006-04-03 20:38:34 +0000
commit9a791dffeae2097aa0a18f645ce07acfed41b9bc (patch)
tree2d0359536fe3c1a0c313440b6be4ed09397dade9 /src/mainboard/tyan/s2850
parentffb7d8a31ae899f611235cd0a7f3579d34cd8cde (diff)
downloadcoreboot-9a791dffeae2097aa0a18f645ce07acfed41b9bc.tar.xz
new cache_as_ram support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2232 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s2850')
-rw-r--r--src/mainboard/tyan/s2850/Config.lb1
-rw-r--r--src/mainboard/tyan/s2850/cache_as_ram_auto.c29
2 files changed, 2 insertions, 28 deletions
diff --git a/src/mainboard/tyan/s2850/Config.lb b/src/mainboard/tyan/s2850/Config.lb
index 1916fa70c3..e227bc1542 100644
--- a/src/mainboard/tyan/s2850/Config.lb
+++ b/src/mainboard/tyan/s2850/Config.lb
@@ -44,7 +44,6 @@ driver mainboard.o
if HAVE_MP_TABLE object mptable.o end
if HAVE_PIRQ_TABLE object irq_tables.o end
-object reset.o
if USE_DCACHE_RAM
diff --git a/src/mainboard/tyan/s2850/cache_as_ram_auto.c b/src/mainboard/tyan/s2850/cache_as_ram_auto.c
index ba01699c07..5ca8561ea7 100644
--- a/src/mainboard/tyan/s2850/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2850/cache_as_ram_auto.c
@@ -47,31 +47,7 @@ static void post_code(uint8_t value) {
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
-static void hard_reset(void)
-{
- device_t dev;
-
- /* Find the device */
- dev = PCI_DEV(node_link_to_bus(0, 0), 0x04, 3);
-
- set_bios_reset();
-
- /* enable cf9 */
- pci_write_config8(dev, 0x41, 0xf1);
- /* reset */
- outb(0x0e, 0x0cf9);
-}
-
-static void soft_reset(void)
-{
- device_t dev;
-
- /* Find the device */
- dev = PCI_DEV(node_link_to_bus(0, 0), 0x04, 0);
-
- set_bios_reset();
- pci_write_config8(dev, 0x47, 1);
-}
+#include "southbridge/amd/amd8111/amd8111_early_ctrl.c"
static void memreset_setup(void)
{
@@ -200,7 +176,6 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
};
int needs_reset;
- unsigned cpu_reset = 0;
if (bist == 0) {
init_cpus(cpu_init_detectedx);
@@ -235,5 +210,5 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
memreset_setup();
sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu);
- post_cache_as_ram(cpu_reset);
+ post_cache_as_ram();
}