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authorEdwin Beasant <edwin_beasant@virtensys.com>2010-07-06 21:05:04 +0000
committerMyles Watson <mylesgw@gmail.com>2010-07-06 21:05:04 +0000
commiteb50c7d922e91f0247b3705eccb2d2eec638c277 (patch)
tree2def570d089b2f6deb2beac165e18756a578e308 /src/mainboard/tyan/s2850
parent8376831eafc1be1175529fd21e0d2fe40339d4eb (diff)
downloadcoreboot-eb50c7d922e91f0247b3705eccb2d2eec638c277.tar.xz
Re-integrate "USE_OPTION_TABLE" code.
Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com> Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5653 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s2850')
-rw-r--r--src/mainboard/tyan/s2850/Kconfig1
-rw-r--r--src/mainboard/tyan/s2850/romstage.c3
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/tyan/s2850/Kconfig b/src/mainboard/tyan/s2850/Kconfig
index ed08c225ed..788096bf6f 100644
--- a/src/mainboard/tyan/s2850/Kconfig
+++ b/src/mainboard/tyan/s2850/Kconfig
@@ -7,6 +7,7 @@ config BOARD_TYAN_S2850
select SOUTHBRIDGE_AMD_AMD8111
select SUPERIO_WINBOND_W83627HF
select HAVE_HARD_RESET
+ select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select BOARD_ROMSIZE_KB_512
diff --git a/src/mainboard/tyan/s2850/romstage.c b/src/mainboard/tyan/s2850/romstage.c
index d51c4a86dd..434e85d58c 100644
--- a/src/mainboard/tyan/s2850/romstage.c
+++ b/src/mainboard/tyan/s2850/romstage.c
@@ -7,8 +7,7 @@
#include <arch/romcc_io.h>
#include <cpu/x86/lapic.h>
#include <stdlib.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
#include <console/console.h>
#include "lib/ramtest.c"