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author | Ronald G. Minnich <rminnich@gmail.com> | 2003-08-27 14:33:13 +0000 |
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committer | Ronald G. Minnich <rminnich@gmail.com> | 2003-08-27 14:33:13 +0000 |
commit | fa2df758f226f5b06537c6e6f8e27072b94644c5 (patch) | |
tree | c5cb52825577c8d3825121283e020ad44a3fccd8 /src/mainboard/tyan/s2880/auto.c | |
parent | bee6575d7cdc065be6f8b83f9217602e44f29c20 (diff) | |
download | coreboot-fa2df758f226f5b06537c6e6f8e27072b94644c5.tar.xz |
support for new mobos and fixes
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1087 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s2880/auto.c')
-rw-r--r-- | src/mainboard/tyan/s2880/auto.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/tyan/s2880/auto.c b/src/mainboard/tyan/s2880/auto.c index 5dd6c673a0..5386b10d97 100644 --- a/src/mainboard/tyan/s2880/auto.c +++ b/src/mainboard/tyan/s2880/auto.c @@ -14,21 +14,21 @@ #include "lib/delay.c" #include "cpu/p6/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" -//#include "debug.c" +#include "debug.c" static void memreset_setup(void) { /* Set the memreset low */ - outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 28); +// outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 28); /* Ensure the BIOS has control of the memory lines */ - outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 29); +// outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 29); } static void memreset(int controllers, const struct mem_controller *ctrl) { udelay(800); /* Set memreset_high */ - outb((0<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 28); +// outb((0<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 28); udelay(90); } @@ -179,7 +179,7 @@ static void main(void) memreset_setup(); sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); -#if 0 +#if 1 dump_pci_devices(); #endif #if 0 |