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authorJason Schildt <jschildt@gmail.com>2005-10-25 21:46:09 +0000
committerJason Schildt <jschildt@gmail.com>2005-10-25 21:46:09 +0000
commitf274d94360a8b5e80b688f5005a8e4a1da8bfe5f (patch)
treeac6d87740b1c665d5ed0545e9de152a84d5c0da2 /src/mainboard/tyan/s2880
parentfddf46f275f27b20a05ff761c4e267fd619e9664 (diff)
downloadcoreboot-f274d94360a8b5e80b688f5005a8e4a1da8bfe5f.tar.xz
- See Issue Tracker id-13 "lnxi-patch-13".
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2077 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s2880')
-rw-r--r--src/mainboard/tyan/s2880/failover.c25
1 files changed, 3 insertions, 22 deletions
diff --git a/src/mainboard/tyan/s2880/failover.c b/src/mainboard/tyan/s2880/failover.c
index 9164e7b091..6b7eda80be 100644
--- a/src/mainboard/tyan/s2880/failover.c
+++ b/src/mainboard/tyan/s2880/failover.c
@@ -9,6 +9,7 @@
#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
#include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdk8/reset_test.c"
#if CONFIG_LOGICAL_CPUS==1
@@ -18,27 +19,15 @@
static unsigned long main(unsigned long bist)
{
-#if CONFIG_LOGICAL_CPUS==1
- struct node_core_id id;
-#else
- unsigned nodeid;
-#endif
/* Make cerain my local apic is useable */
enable_lapic();
-#if CONFIG_LOGICAL_CPUS==1
- id = get_node_core_id_x();
/* Is this a cpu only reset? */
- if (cpu_init_detected(id.nodeid)) {
-#else
- nodeid = lapicid();
- /* Is this a cpu only reset? */
- if (cpu_init_detected(nodeid)) {
-#endif
+ if (early_mtrr_init_detected()) {
if (last_boot_normal()) {
goto normal_image;
} else {
- goto cpu_reset;
+ goto fallback_image;
}
}
/* Is this a secondary cpu? */
@@ -74,14 +63,6 @@ static unsigned long main(unsigned long bist)
: "a" (bist) /* inputs */
: /* clobbers */
);
- cpu_reset:
-#if 0
- asm volatile ("jmp __cpu_reset"
- : /* outputs */
- : "a"(bist) /* inputs */
- : /* clobbers */
- );
-#endif
fallback_image:
return bist;
}