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authorCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2008-10-01 12:52:52 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2008-10-01 12:52:52 +0000
commit2ee6779a64922af755a35ce70f85f2d67b488557 (patch)
tree4ae6d7310d71fa29baab3e937cfcd9bb408db5a6 /src/mainboard/tyan/s2880
parentdc65196f8f18c28085d40ccbeb45bba3bfe28294 (diff)
downloadcoreboot-2ee6779a64922af755a35ce70f85f2d67b488557.tar.xz
The ARRAY_SIZE macro is convenient, yet mostly unused. Switch lots of
code to use it. That makes the code more readable and also less error-prone. Abuild tested. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3624 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s2880')
-rw-r--r--src/mainboard/tyan/s2880/cache_as_ram_auto.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/tyan/s2880/cache_as_ram_auto.c b/src/mainboard/tyan/s2880/cache_as_ram_auto.c
index bb423673d8..de4b4895f8 100644
--- a/src/mainboard/tyan/s2880/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2880/cache_as_ram_auto.c
@@ -7,6 +7,7 @@
#include <device/pnp_def.h>
#include <arch/romcc_io.h>
#include <cpu/x86/lapic.h>
+#include <stdlib.h>
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
@@ -205,7 +206,7 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
enable_smbus();
memreset_setup();
- sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu);
+ sdram_initialize(ARRAY_SIZE(cpu), cpu);
post_cache_as_ram();
}