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authorUwe Hermann <uwe@hermann-uwe.de>2010-11-21 11:36:03 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-11-21 11:36:03 +0000
commit6dc92f0d1a4b6a79c2db800c5bd071daa75a9a23 (patch)
tree1b06518d371222763417675b38161d261bd42f93 /src/mainboard/tyan/s2882
parent86a571797d9ede9d79edcfdce38f50a80b9a49f9 (diff)
downloadcoreboot-6dc92f0d1a4b6a79c2db800c5bd071daa75a9a23.tar.xz
Use DIMM0 et al in lots more places instead of hardocding values.
The (0xa << 3) expression equals 0x50, i.e. DIMM0. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6103 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s2882')
-rw-r--r--src/mainboard/tyan/s2882/romstage.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/src/mainboard/tyan/s2882/romstage.c b/src/mainboard/tyan/s2882/romstage.c
index c050c2bf49..c17bc1376c 100644
--- a/src/mainboard/tyan/s2882/romstage.c
+++ b/src/mainboard/tyan/s2882/romstage.c
@@ -9,6 +9,7 @@
#include <pc80/mc146818rtc.h>
#include <console/console.h>
#include <lib.h>
+#include <spd.h>
#include <cpu/amd/model_fxx_rev.h>
#include "northbridge/amd/amdk8/incoherent_ht.c"
@@ -85,8 +86,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
.f1 = PCI_DEV(0, 0x18, 1),
.f2 = PCI_DEV(0, 0x18, 2),
.f3 = PCI_DEV(0, 0x18, 3),
- .channel0 = { (0xa<<3)|0, (0xa<<3)|2, 0, 0 },
- .channel1 = { (0xa<<3)|1, (0xa<<3)|3, 0, 0 },
+ .channel0 = { DIMM0, DIMM2, 0, 0 },
+ .channel1 = { DIMM1, DIMM3, 0, 0 },
},
#if CONFIG_MAX_PHYSICAL_CPUS > 1
{
@@ -95,8 +96,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
.f1 = PCI_DEV(0, 0x19, 1),
.f2 = PCI_DEV(0, 0x19, 2),
.f3 = PCI_DEV(0, 0x19, 3),
- .channel0 = { (0xa<<3)|4, (0xa<<3)|6, 0, 0 },
- .channel1 = { (0xa<<3)|5, (0xa<<3)|7, 0, 0 },
+ .channel0 = { DIMM4, DIMM6, 0, 0 },
+ .channel1 = { DIMM5, DIMM7, 0, 0 },
},
#endif
};