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author | Yinghai Lu <yinghailu@gmail.com> | 2004-10-20 05:07:16 +0000 |
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committer | Yinghai Lu <yinghailu@gmail.com> | 2004-10-20 05:07:16 +0000 |
commit | 6a61d6a4ae26d02844bf8043525d89b0ef9e0351 (patch) | |
tree | ffe2c7e2680ccb73502fe4129b9727051792dadb /src/mainboard/tyan/s2885/resourcemap.c | |
parent | abed01d81d0c55848232a9ebd9bb4c55d036f45d (diff) | |
download | coreboot-6a61d6a4ae26d02844bf8043525d89b0ef9e0351.tar.xz |
Tyan update to work with new CPU Config
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1693 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s2885/resourcemap.c')
-rw-r--r-- | src/mainboard/tyan/s2885/resourcemap.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/tyan/s2885/resourcemap.c b/src/mainboard/tyan/s2885/resourcemap.c index 31cf8e04a5..2c51f1d114 100644 --- a/src/mainboard/tyan/s2885/resourcemap.c +++ b/src/mainboard/tyan/s2885/resourcemap.c @@ -252,8 +252,8 @@ static void setup_s2885_resource_map(void) * [31:24] Bus Number Limit i * This field defines the highest bus number in configuration regin i */ - PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x06010207, - PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000007, + PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x06000203, // AMD 8111 on link2 of CPU 0 + PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x08070003, // AMD 8151 on link0 of CPU 0 PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000, PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000, }; |