summaryrefslogtreecommitdiff
path: root/src/mainboard/tyan/s2891/mptable.c
diff options
context:
space:
mode:
authorMyles Watson <mylesgw@gmail.com>2009-03-10 20:56:54 +0000
committerMyles Watson <mylesgw@gmail.com>2009-03-10 20:56:54 +0000
commit34b1d4ef376358661265fbdb64553332aa952e29 (patch)
tree5e4fc7cf260d6bff4dd73227820014300e7bf04d /src/mainboard/tyan/s2891/mptable.c
parent283a49452184365112c1520b0864d930dd8ab63b (diff)
downloadcoreboot-34b1d4ef376358661265fbdb64553332aa952e29.tar.xz
This patch adds ACPI support for Tyan s2891, s2892, and s2895. There is still
a problem with IRQ 9, but besides that Linux is happy. BSOD in Windows still. changes by file: src/mainboard/tyan/s289X/Options.lb: Add options and defaults for ACPI tables and resources. src/mainboard/tyan/s289X/mainboard.c: Add high_tables resource ala Stefan's code for the Kontron. src/mainboard/tyan/s289X/acpi_tables.c: Fill out the ACPI tables, using existing code where possible. Only the madt is different between the boards, to be combined later. src/mainboard/tyan/s289X/Config.lb: Compile in acpi_tables.c and dsdt.dsl. Turn on the parallel port and the real-time-clock. src/mainboard/tyan/s289x/dsdt.dsl: The board layout (thanks Rudolf) and interrupts from mptable.c src/mainboard/tyan/s289x/mptable.c: Minor formatting changes to make them diff better. src/superio/smsc/lpc47b397/superio.c: Correct the size of the real-time-clock so it can be where it belongs. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Rudolf Marek <r.marek@assembler.cz> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3989 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s2891/mptable.c')
-rw-r--r--src/mainboard/tyan/s2891/mptable.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/src/mainboard/tyan/s2891/mptable.c b/src/mainboard/tyan/s2891/mptable.c
index cf917eeb8e..a03f117325 100644
--- a/src/mainboard/tyan/s2891/mptable.c
+++ b/src/mainboard/tyan/s2891/mptable.c
@@ -122,8 +122,7 @@ void *smp_write_config_table(void *v)
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xf, apicid_ck804, 0xf);
// Onboard ck804 smbus
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn+1)<<2)|1, apicid_ck804, 0xa);
-// 10
+ smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn+1)<<2)|1, apicid_ck804, 0xa); // 10
// Onboard ck804 USB 1.1
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn+2)<<2)|0, apicid_ck804, 0x15); // 21
@@ -137,7 +136,7 @@ void *smp_write_config_table(void *v)
// Onboard ck804 SATA 1
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn +8)<<2)|0, apicid_ck804, 0x16); // 22
-//Slot PCIE x16
+//Slot PCIE x16
for(i=0;i<4;i++) {
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_5, (0x00<<2)|i, apicid_ck804, 0x10 + (2+i+4-sbdn%4)%4);
}