summaryrefslogtreecommitdiff
path: root/src/mainboard/tyan/s2891
diff options
context:
space:
mode:
authorUwe Hermann <uwe@hermann-uwe.de>2010-11-21 22:47:22 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-11-21 22:47:22 +0000
commit7b997053eb2fcde464f5f6a1e5c85d1ffb6b4e32 (patch)
tree5339d014fbd29d3eb27cc82987eb7d655d9d8d1a /src/mainboard/tyan/s2891
parent57b2ff886e0ce2c92820f5722c8031def3ac94cf (diff)
downloadcoreboot-7b997053eb2fcde464f5f6a1e5c85d1ffb6b4e32.tar.xz
Simplify a few code chunks, fix whitespace and indentation.
Also, remove some less useful comments, some dead code / unused functions. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6108 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s2891')
-rw-r--r--src/mainboard/tyan/s2891/romstage.c34
1 files changed, 6 insertions, 28 deletions
diff --git a/src/mainboard/tyan/s2891/romstage.c b/src/mainboard/tyan/s2891/romstage.c
index 75405753e9..39bdc65e7e 100644
--- a/src/mainboard/tyan/s2891/romstage.c
+++ b/src/mainboard/tyan/s2891/romstage.c
@@ -25,18 +25,9 @@
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
-static void memreset_setup(void)
-{
-}
-
-static void memreset(int controllers, const struct mem_controller *ctrl)
-{
-}
-
-static inline void activate_spd_rom(const struct mem_controller *ctrl)
-{
- /* nothing to do */
-}
+static void memreset_setup(void) { }
+static void memreset(int controllers, const struct mem_controller *ctrl) { }
+static void activate_spd_rom(const struct mem_controller *ctrl) { }
static inline int spd_read_byte(unsigned device, unsigned address)
{
@@ -46,7 +37,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/amd/amdk8/raminit.c"
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "lib/generic_sdram.c"
-#include "resourcemap.c" /* tyan does not want the default */
+#include "resourcemap.c"
#include "cpu/amd/dualcore/dualcore.c"
#include "southbridge/nvidia/ck804/ck804_early_setup_ss.h"
#include "southbridge/nvidia/ck804/ck804_early_setup.c"
@@ -92,23 +83,18 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
};
int needs_reset;
- unsigned bsp_apicid = 0;
-
+ unsigned bsp_apicid = 0, nodes;
struct mem_controller ctrl[8];
- unsigned nodes;
if (!cpu_init_detectedx && boot_cpu()) {
/* Nothing special needs to be done to find bus 0 */
/* Allow the HT devices to be found */
-
enumerate_ht_chain();
-
sio_setup();
}
- if (bist == 0) {
+ if (bist == 0)
bsp_apicid = init_cpus(cpu_init_detectedx);
- }
// post_code(0x32);
@@ -135,9 +121,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
#endif
needs_reset |= ht_setup_chains_x();
-
needs_reset |= ck804_early_setup_x();
-
if (needs_reset) {
printk(BIOS_INFO, "ht reset -\n");
soft_reset();
@@ -152,8 +136,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
enable_smbus();
#if 0
dump_spd_registers(&cpu[0]);
-#endif
-#if 0
dump_smbus_registers();
#endif
@@ -162,12 +144,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
#if 0
print_pci_devices();
-#endif
-
-#if 0
dump_pci_devices();
#endif
post_cache_as_ram();
}
-