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author | Jonathan A. Kollasch <jakllsch@kollasch.net> | 2013-10-11 14:58:39 -0500 |
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committer | Jonathan A. Kollasch <jakllsch@kollasch.net> | 2013-10-14 02:17:03 +0200 |
commit | b6795255389ffd2320307dc6848919049016dfbd (patch) | |
tree | 01f2e1f66944d3e2411653acb79064520fc7cf49 /src/mainboard/tyan/s2891 | |
parent | 3fa1a13f62fe805a4592eaa551cd9d5713613f91 (diff) | |
download | coreboot-b6795255389ffd2320307dc6848919049016dfbd.tar.xz |
ck804: obtain I/O APIC base address for ACPI MADT from allocator
Change-Id: I67192c8ae99e396ea4b17e03c658f31dbb5c1800
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: http://review.coreboot.org/3960
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/tyan/s2891')
-rw-r--r-- | src/mainboard/tyan/s2891/acpi_tables.c | 21 |
1 files changed, 12 insertions, 9 deletions
diff --git a/src/mainboard/tyan/s2891/acpi_tables.c b/src/mainboard/tyan/s2891/acpi_tables.c index 890e239560..42d9152ceb 100644 --- a/src/mainboard/tyan/s2891/acpi_tables.c +++ b/src/mainboard/tyan/s2891/acpi_tables.c @@ -32,23 +32,26 @@ unsigned long acpi_fill_madt(unsigned long current) { unsigned long apic_addr; device_t dev; + struct resource *res; /* create all subtables for processors */ current = acpi_create_madt_lapics(current); /* Write NVIDIA CK804 IOAPIC. */ dev = dev_find_slot(0x0, PCI_DEVFN(0x1,0)); - if (dev) { - apic_addr = pci_read_config32(dev, PCI_BASE_ADDRESS_1) & ~0xf; - current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 4, - apic_addr, 0); - /* Initialize interrupt mapping if mptable.c didn't. */ + ASSERT(dev != NULL); + + res = find_resource(dev, PCI_BASE_ADDRESS_1); + ASSERT(res != NULL); + + current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 4, + res->base, 0); + /* Initialize interrupt mapping if mptable.c didn't. */ #if (!CONFIG_GENERATE_MP_TABLE) - pci_write_config32(dev, 0x7c, 0x0120d218); - pci_write_config32(dev, 0x80, 0x12008a00); - pci_write_config32(dev, 0x84, 0x0000007d); + pci_write_config32(dev, 0x7c, 0x0120d218); + pci_write_config32(dev, 0x80, 0x12008a00); + pci_write_config32(dev, 0x84, 0x0000007d); #endif - } /* Write AMD 8131 two IOAPICs. */ dev = dev_find_slot(0x40, PCI_DEVFN(0x0,1)); |