new cache_as_ram support

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2232 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

5 files changed, 33 insertions, 28 deletions

diff --git a/src/mainboard/tyan/s2891/Config.lb b/src/mainboard/tyan/s2891/Config.lb
index 9c460066c9..67c7b3c8a9 100644
--- a/src/mainboard/tyan/s2891/Config.lb
+++ b/src/mainboard/tyan/s2891/Config.lb
@@ -237,7 +237,7 @@ chip northbridge/amd/amdk8/root_complex
                                         	                io 0x60 = 0x2f8
                                                 	        irq 0x70 = 3
 	                                                end
-        	                                        device pnp 2e.5 off #  Keyboard
+        	                                        device pnp 2e.5 on #  Keyboard
                 	                                        io 0x60 = 0x60
                         	                                io 0x62 = 0x64
                                 	                        irq 0x70 = 1
@@ -314,7 +314,7 @@ chip northbridge/amd/amdk8/root_complex
 					#	chip drivers/ati/ragexl
                                                 chip drivers/pci/onboard
                                                         device pci 7.0 on end
-                                        #                register "rom_address" = "0xfff80000" #for 512K
+                                               #         register "rom_address" = "0xfff80000" #for 512K
 							register "rom_address" = "0xfff00000" #for 1M
                                                 end
 					end
diff --git a/src/mainboard/tyan/s2891/Options.lb b/src/mainboard/tyan/s2891/Options.lb
index e87a4df341..9018364663 100644
--- a/src/mainboard/tyan/s2891/Options.lb
+++ b/src/mainboard/tyan/s2891/Options.lb
@@ -54,6 +54,7 @@ uses CONFIG_CHIP_NAME
 uses CONFIG_CONSOLE_VGA
 uses CONFIG_PCI_ROM_RUN
 uses K8_HW_MEM_HOLE_SIZEK
+uses K8_HT_FREQ_1G_SUPPORT
 
 uses USE_DCACHE_RAM
 uses DCACHE_RAM_BASE
@@ -66,6 +67,13 @@ uses LIFT_BSP_APIC_ID
 
 uses CONFIG_PCI_64BIT_PREF_MEM
 
+uses HT_CHAIN_UNITID_BASE
+uses HT_CHAIN_END_UNITID_BASE
+uses K8_SB_HT_CHAIN_ON_BUS0
+uses SB_HT_CHAIN_UNITID_OFFSET_ONLY
+
+uses CONFIG_LB_MEM_TOPK
+
 ## ROM_SIZE is the size of boot ROM that this board will use.
 #512K bytes 
 #default ROM_SIZE=524288
@@ -131,6 +139,22 @@ default CONFIG_LOGICAL_CPUS=1
 #1G memory hole
 default K8_HW_MEM_HOLE_SIZEK=0x100000
 
+#Opteron K8 1G HT Support
+default K8_HT_FREQ_1G_SUPPORT=1
+
+##HT Unit ID offset, default is 1, the typical one
+default HT_CHAIN_UNITID_BASE=0x0
+
+##real SB Unit ID, default is 0x20, mean dont touch it at last
+#default HT_CHAIN_END_UNITID_BASE=0x0
+
+#make the SB HT chain on bus 0, default is not (0)
+default K8_SB_HT_CHAIN_ON_BUS0=2
+
+##only offset for SB chain?, default is yes(1)
+default SB_HT_CHAIN_UNITID_OFFSET_ONLY=0
+
+
 #BTEXT Console
 #default CONFIG_CONSOLE_BTEXT=1
 
@@ -144,9 +168,9 @@ default CONFIG_PCI_ROM_RUN=1
 default USE_DCACHE_RAM=1
 default DCACHE_RAM_BASE=0xcf000
 default DCACHE_RAM_SIZE=0x1000
-default CONFIG_USE_INIT=1
+default CONFIG_USE_INIT=0
 
-default ENABLE_APIC_EXT_ID=1
+default ENABLE_APIC_EXT_ID=0
 default APIC_ID_OFFSET=0x10
 default LIFT_BSP_APIC_ID=0
 
diff --git a/src/mainboard/tyan/s2891/cache_as_ram_auto.c b/src/mainboard/tyan/s2891/cache_as_ram_auto.c
index 61edc58cd2..1bc29d9304 100644
--- a/src/mainboard/tyan/s2891/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2891/cache_as_ram_auto.c
@@ -42,25 +42,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
 
-static void hard_reset(void)
-{
-        set_bios_reset();
-
-        /* full reset */
-	outb(0x0a, 0x0cf9);
-        outb(0x0e, 0x0cf9);
-}
-
-static void soft_reset(void)
-{
-        set_bios_reset();
-#if 1
-        /* link reset */
-	outb(0x02, 0x0cf9);
-        outb(0x06, 0x0cf9);
-#endif
-}
-
 static void memreset_setup(void)
 {
 }
@@ -197,7 +178,6 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	};
 
         int needs_reset;
-	unsigned cpu_reset = 0;
         unsigned bsp_apicid = 0;
 
         struct mem_controller ctrl[8];
@@ -246,5 +226,5 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	memreset_setup();
 	sdram_initialize(nodes, ctrl);
 
-	post_cache_as_ram(cpu_reset);
+	post_cache_as_ram();
 }
diff --git a/src/mainboard/tyan/s2891/get_bus_conf.c b/src/mainboard/tyan/s2891/get_bus_conf.c
index 92fefa6a0c..3462a5f557 100644
--- a/src/mainboard/tyan/s2891/get_bus_conf.c
+++ b/src/mainboard/tyan/s2891/get_bus_conf.c
@@ -152,9 +152,10 @@ void get_bus_conf(void)
                 else {
                         printk_debug("ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn+ 0x0e);
 
-                        bus_8131_0 = bus_ck804_5+1;
                 }
 
+		bus_8131_0 = (pci1234[1] >> 16) & 0xff;
+
                 /* 8131-1 */
                 dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,0));
                 if (dev) {
diff --git a/src/mainboard/tyan/s2891/resourcemap.c b/src/mainboard/tyan/s2891/resourcemap.c
index c55d95bb99..625e19f11c 100644
--- a/src/mainboard/tyan/s2891/resourcemap.c
+++ b/src/mainboard/tyan/s2891/resourcemap.c
@@ -186,7 +186,7 @@ static void setup_s2891_resource_map(void)
 		 *	   This field defines the end of PCI I/O region n
 		 * [31:25] Reserved
 		 */
-		PCI_ADDR(0, 0x18, 1, 0xC4), 0xFE000FC8, 0x01fff000,
+//		PCI_ADDR(0, 0x18, 1, 0xC4), 0xFE000FC8, 0x01fff000,
 		PCI_ADDR(0, 0x18, 1, 0xCC), 0xFE000FC8, 0x00000000, 
 		PCI_ADDR(0, 0x18, 1, 0xD4), 0xFE000FC8, 0x00000000,
 		PCI_ADDR(0, 0x18, 1, 0xDC), 0xFE000FC8, 0x00000000,
@@ -216,7 +216,7 @@ static void setup_s2891_resource_map(void)
 		 *	   This field defines the start of PCI I/O region n 
 		 * [31:25] Reserved
 		 */
-		PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000033,
+//		PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000033,
 		PCI_ADDR(0, 0x18, 1, 0xC8), 0xFE000FCC, 0x00000000,
 		PCI_ADDR(0, 0x18, 1, 0xD0), 0xFE000FCC, 0x00000000,
 		PCI_ADDR(0, 0x18, 1, 0xD8), 0xFE000FCC, 0x00000000,