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| author | Yinghai Lu <yinghailu@gmail.com> | 2006-10-04 23:57:49 +0000 |
|---|---|---|
| committer | Yinghai Lu <yinghailu@gmail.com> | 2006-10-04 23:57:49 +0000 |
| commit | 6d74d76de46e733fa4866f47b58be60feb472f1f (patch) | |
| tree | 16f31f8d51e6eaa021bc26a47d6c8d92568c5fb3 /src/mainboard/tyan/s2892/Options.lb | |
| parent | d95465d08f5be0ec46fe3b1f801b98f7c5a43f81 (diff) | |
| download | coreboot-6d74d76de46e733fa4866f47b58be60feb472f1f.tar.xz | |
get_bus_cong using sysconf instead
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2442 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s2892/Options.lb')
| -rw-r--r-- | src/mainboard/tyan/s2892/Options.lb | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/src/mainboard/tyan/s2892/Options.lb b/src/mainboard/tyan/s2892/Options.lb index 30e6d617c2..92ebe2e738 100644 --- a/src/mainboard/tyan/s2892/Options.lb +++ b/src/mainboard/tyan/s2892/Options.lb @@ -54,7 +54,6 @@ uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN uses HW_MEM_HOLE_SIZEK -uses K8_HT_FREQ_1G_SUPPORT uses USE_DCACHE_RAM uses DCACHE_RAM_BASE @@ -66,12 +65,14 @@ uses HT_CHAIN_END_UNITID_BASE uses SB_HT_CHAIN_ON_BUS0 uses SB_HT_CHAIN_UNITID_OFFSET_ONLY +uses CONFIG_LB_MEM_TOPK + ## ROM_SIZE is the size of boot ROM that this board will use. #512K bytes -#default ROM_SIZE=524288 +default ROM_SIZE=524288 #1M bytes -default ROM_SIZE=1048576 +#default ROM_SIZE=1048576 ## @@ -128,12 +129,6 @@ default CONFIG_MAX_CPUS=4 default CONFIG_MAX_PHYSICAL_CPUS=2 default CONFIG_LOGICAL_CPUS=1 -#1G memory hole -default HW_MEM_HOLE_SIZEK=0x100000 - -#Opteron K8 1G HT Support -default K8_HT_FREQ_1G_SUPPORT=1 - ##HT Unit ID offset, default is 1, the typical one default HT_CHAIN_UNITID_BASE=0x0 @@ -146,6 +141,9 @@ default SB_HT_CHAIN_ON_BUS0=2 ##only offset for SB chain?, default is yes(1) default SB_HT_CHAIN_UNITID_OFFSET_ONLY=0 +#1G memory hole +default HW_MEM_HOLE_SIZEK=0x100000 + #BTEXT Console #default CONFIG_CONSOLE_BTEXT=1 @@ -161,6 +159,7 @@ default DCACHE_RAM_BASE=0xcf000 default DCACHE_RAM_SIZE=0x1000 default CONFIG_USE_INIT=0 + ## ## Build code to setup a generic IOAPIC ## |