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author | Uwe Hermann <uwe@hermann-uwe.de> | 2010-11-21 17:29:59 +0000 |
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committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-11-21 17:29:59 +0000 |
commit | 57b2ff886e0ce2c92820f5722c8031def3ac94cf (patch) | |
tree | 3bf95eb33cd3de0b8f2bae495b3ae1453601c4d3 /src/mainboard/tyan/s2892 | |
parent | 5244e1ba63e5f3ea12066734bfb0d864a8f1f11d (diff) | |
download | coreboot-57b2ff886e0ce2c92820f5722c8031def3ac94cf.tar.xz |
Drop excessive whitespace randomly sprinkled in romstage.c files.
Also drop some dead or useless code snippets.
Abuild-tested.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6107 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s2892')
-rw-r--r-- | src/mainboard/tyan/s2892/romstage.c | 18 |
1 files changed, 2 insertions, 16 deletions
diff --git a/src/mainboard/tyan/s2892/romstage.c b/src/mainboard/tyan/s2892/romstage.c index 1cf18258e7..180609c72e 100644 --- a/src/mainboard/tyan/s2892/romstage.c +++ b/src/mainboard/tyan/s2892/romstage.c @@ -6,27 +6,21 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <pc80/mc146818rtc.h> - #include <console/console.h> #include <lib.h> #include <spd.h> - #include <cpu/amd/model_fxx_rev.h> - #include "northbridge/amd/amdk8/incoherent_ht.c" #include "southbridge/nvidia/ck804/ck804_early_smbus.h" #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" - #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c" - #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" - #include "northbridge/amd/amdk8/setup_resource_map.c" #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) @@ -48,13 +42,10 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/raminit.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "lib/generic_sdram.c" - - /* tyan does not want the default */ -#include "resourcemap.c" - +#include "resourcemap.c" /* tyan does not want the default */ #include "cpu/amd/dualcore/dualcore.c" - #include "southbridge/nvidia/ck804/ck804_early_setup_ss.h" + //set GPIO to input mode #define CK804_MB_SETUP \ RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+15, ~(0xff),((0<<4)|(0<<2)|(0<<0)),/* M8,GPIO16, PCIXA_PRSNT2_L*/ \ @@ -63,13 +54,8 @@ static inline int spd_read_byte(unsigned device, unsigned address) RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+45, ~(0xff),((0<<4)|(0<<2)|(0<<0)),/* P7,GPIO46, PCIXB_PRSNT2_L*/ \ #include "southbridge/nvidia/ck804/ck804_early_setup_car.c" - - - #include "cpu/amd/car/post_cache_as_ram.c" - #include "cpu/amd/model_fxx/init_cpus.c" - #include "northbridge/amd/amdk8/early_ht.c" static void sio_setup(void) |