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| author | Stefan Reinauer <stepan@openbios.org> | 2005-12-01 10:54:44 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2005-12-01 10:54:44 +0000 |
| commit | 806e146e754a44f96c693cde707065b14f80d8a2 (patch) | |
| tree | e8e174faffc6f7674b93b5b34d17ef3fa716c32f /src/mainboard/tyan/s2895/Options.lb | |
| parent | 70597f96c45e225a42f395cdf16b4ad62459dc3b (diff) | |
| download | coreboot-806e146e754a44f96c693cde707065b14f80d8a2.tar.xz | |
Applying 11_26_car_tyan.diff from Yinghai Lu.
NOTE: This will break the tree so it can be fixed up later
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2115 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s2895/Options.lb')
| -rw-r--r-- | src/mainboard/tyan/s2895/Options.lb | 21 |
1 files changed, 18 insertions, 3 deletions
diff --git a/src/mainboard/tyan/s2895/Options.lb b/src/mainboard/tyan/s2895/Options.lb index fc63823480..cfb0e13222 100644 --- a/src/mainboard/tyan/s2895/Options.lb +++ b/src/mainboard/tyan/s2895/Options.lb @@ -52,7 +52,8 @@ uses CONFIG_GDB_STUB uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN -uses K8_E0_MEM_HOLE_SIZEK +uses K8_HW_MEM_HOLE_SIZEK +uses K8_HT_FREQ_1G_SUPPORT uses CK804_DEVN_BASE @@ -61,6 +62,10 @@ uses DCACHE_RAM_BASE uses DCACHE_RAM_SIZE uses CONFIG_USE_INIT +uses ENABLE_APIC_EXT_ID +uses APIC_ID_OFFSET +uses LIFT_BSP_APIC_ID + ## ROM_SIZE is the size of boot ROM that this board will use. #512K bytes default ROM_SIZE=524288 @@ -71,7 +76,9 @@ default ROM_SIZE=524288 ## ## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -default FALLBACK_SIZE=131072 +#default FALLBACK_SIZE=131072 +#256K +default FALLBACK_SIZE=0x40000 ### ### Build options @@ -124,7 +131,10 @@ default CONFIG_LOGICAL_CPUS=1 #default CONFIG_CHIP_NAME=1 #1G memory hole -default K8_E0_MEM_HOLE_SIZEK=0x100000 +default K8_HW_MEM_HOLE_SIZEK=0x100000 + +#Opteron K8 1G HT Support +default K8_HT_FREQ_1G_SUPPORT=1 #CK804 setting #default CK804_DEVN_BASE=0 @@ -141,6 +151,11 @@ default DCACHE_RAM_BASE=0xcf000 default DCACHE_RAM_SIZE=0x1000 default CONFIG_USE_INIT=1 +default ENABLE_APIC_EXT_ID=1 +default APIC_ID_OFFSET=0x10 +default LIFT_BSP_APIC_ID=0 + + ## ## Build code to setup a generic IOAPIC ## |