summaryrefslogtreecommitdiff
path: root/src/mainboard/tyan/s2895
diff options
context:
space:
mode:
authorJason Schildt <jschildt@gmail.com>2005-10-25 21:45:17 +0000
committerJason Schildt <jschildt@gmail.com>2005-10-25 21:45:17 +0000
commitfddf46f275f27b20a05ff761c4e267fd619e9664 (patch)
tree23d5651fa8e93c1cc1f9bf13363c32830d4d33b4 /src/mainboard/tyan/s2895
parentcf6df2afb5becca923e398521ae0e2d155cf3aa2 (diff)
downloadcoreboot-fddf46f275f27b20a05ff761c4e267fd619e9664.tar.xz
- See Issue Tracker id-12 "lnxi-patch-12".
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2076 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s2895')
-rw-r--r--src/mainboard/tyan/s2895/auto.c82
1 files changed, 3 insertions, 79 deletions
diff --git a/src/mainboard/tyan/s2895/auto.c b/src/mainboard/tyan/s2895/auto.c
index 0a26f21735..8c11f30fa7 100644
--- a/src/mainboard/tyan/s2895/auto.c
+++ b/src/mainboard/tyan/s2895/auto.c
@@ -28,6 +28,7 @@
#include "cpu/amd/mtrr/amd_earlymtrr.c"
#include "cpu/x86/bist.h"
+#include "cpu/amd/dualcore/dualcore.c"
#include "superio/smsc/lpc47b397/lpc47b397_early_gpio.c"
@@ -106,12 +107,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
/* tyan does not want the default */
#include "resourcemap.c"
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#include "cpu/amd/dualcore/dualcore.c"
-#else
-#include "cpu/amd/model_fxx/node_id.c"
-#endif
#define FIRST_CPU 1
#define SECOND_CPU 1
@@ -163,79 +158,12 @@ static void main(unsigned long bist)
};
int needs_reset;
-#if CONFIG_LOGICAL_CPUS==1
- struct node_core_id id;
-#else
- unsigned nodeid;
-#endif
if (bist == 0) {
- /* Skip this if there was a built in self test failure */
- amd_early_mtrr_init();
-
-#if CONFIG_LOGICAL_CPUS==1
- set_apicid_cpuid_lo();
-
- id = get_node_core_id_x(); // that is initid
- #if ENABLE_APIC_EXT_ID == 1
- if(id.coreid == 0) {
- enable_apic_ext_id(id.nodeid);
- }
- #endif
-#else
- nodeid = get_node_id();
- #if ENABLE_APIC_EXT_ID == 1
- enable_apic_ext_id(nodeid);
- #endif
-#endif
-
- enable_lapic();
- init_timer();
-
- post_code(0x30);
-
-#if CONFIG_LOGICAL_CPUS==1
- #if ENABLE_APIC_EXT_ID == 1
- #if LIFT_BSP_APIC_ID == 0
- if( id.nodeid != 0 ) //all except cores in node0
- #endif
- lapic_write(LAPIC_ID, ( lapic_read(LAPIC_ID) | (APIC_ID_OFFSET<<24) ) );
- #endif
-
- if(id.coreid == 0) {
- if (cpu_init_detected(id.nodeid)) {
- asm volatile ("jmp __cpu_reset");
- }
- distinguish_cpu_resets(id.nodeid);
- }
-
-#else
- #if ENABLE_APIC_EXT_ID == 1
- #if LIFT_BSP_APIC_ID == 0
- if(nodeid != 0)
- #endif
- lapic_write(LAPIC_ID, ( lapic_read(LAPIC_ID) | (APIC_ID_OFFSET<<24) ) ); // CPU apicid is from 0x10
-
- #endif
-
- if (cpu_init_detected(nodeid)) {
- asm volatile ("jmp __cpu_reset");
- }
- distinguish_cpu_resets(nodeid);
-#endif
-
- post_code(0x31);
-
- if (!boot_cpu()
-#if CONFIG_LOGICAL_CPUS==1
- || (id.coreid != 0)
-#endif
- ) {
- stop_this_cpu(); // it will stop all cores except core0 of cpu0
- }
+ k8_init_and_stop_secondaries();
}
- post_code(0x32);
+ // post_code(0x32);
lpc47b397_enable_serial(SERIAL_DEV, TTYS0_BASE);
uart_init();
@@ -249,10 +177,6 @@ static void main(unsigned long bist)
setup_s2895_resource_map();
needs_reset = setup_coherent_ht_domain();
-#if CONFIG_LOGICAL_CPUS==1
- // It is said that we should start core1 after all core0 launched
- start_other_cores();
-#endif
needs_reset |= ht_setup_chains_x();