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authorStefan Reinauer <stefan.reinauer@coreboot.org>2011-04-20 20:54:07 +0000
committerStefan Reinauer <stepan@openbios.org>2011-04-20 20:54:07 +0000
commit42fa7fe28b60b448f501e99ee285a0af12c86d34 (patch)
tree247586f11a5be9dcbea2cbafaede92df058ac14b /src/mainboard/tyan/s2912
parentd8129f92c0cbd6a561195c1628ba3f9f98eccd50 (diff)
downloadcoreboot-42fa7fe28b60b448f501e99ee285a0af12c86d34.tar.xz
run uart_init() from console_init, just like the other console initialization functions.
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6531 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s2912')
-rw-r--r--src/mainboard/tyan/s2912/romstage.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c
index eae4428c49..52a100c7df 100644
--- a/src/mainboard/tyan/s2912/romstage.c
+++ b/src/mainboard/tyan/s2912/romstage.c
@@ -131,12 +131,12 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
setup_mb_resource_map();
- uart_init();
+
+ console_init();
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
- console_init();
printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");