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authorStefan Reinauer <stepan@coresystems.de>2010-04-15 12:39:29 +0000
committerStefan Reinauer <stepan@openbios.org>2010-04-15 12:39:29 +0000
commit23836e2345282151b0b46de6cdcd2bb2faee87f6 (patch)
treee1e416ae11a78b455a26f378f33d0a8db6fa69af /src/mainboard/tyan/s2912
parentc30a6e859e20dbadbad006f2f93068e7f9c36043 (diff)
downloadcoreboot-23836e2345282151b0b46de6cdcd2bb2faee87f6.tar.xz
zero warnings days...
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5442 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s2912')
-rw-r--r--src/mainboard/tyan/s2912/romstage.c15
1 files changed, 1 insertions, 14 deletions
diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c
index 3b79a29153..26ce672bf4 100644
--- a/src/mainboard/tyan/s2912/romstage.c
+++ b/src/mainboard/tyan/s2912/romstage.c
@@ -83,10 +83,6 @@
#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c"
-static void memreset_setup(void)
-{
-}
-
static void memreset(int controllers, const struct mem_controller *ctrl)
{
}
@@ -102,12 +98,9 @@ static inline int spd_read_byte(unsigned device, unsigned address)
}
#include "northbridge/amd/amdk8/amdk8_f.h"
-#include "northbridge/amd/amdk8/coherent_ht.c"
-
#include "northbridge/amd/amdk8/incoherent_ht.c"
-
+#include "northbridge/amd/amdk8/coherent_ht.c"
#include "northbridge/amd/amdk8/raminit_f.c"
-
#include "lib/generic_sdram.c"
#include "resourcemap.c"
@@ -130,8 +123,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "southbridge/nvidia/mcp55/mcp55_early_setup_ss.h"
#include "southbridge/nvidia/mcp55/mcp55_early_setup_car.c"
-
-
#include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
@@ -271,8 +262,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
enable_smbus();
- memreset_setup();
-
//do we need apci timer, tsc...., only debug need it for better output
/* all ap stopped? */
// init_timer(); // Need to use TMICT to synconize FID/VID
@@ -280,6 +269,4 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
post_cache_as_ram(); // bsp swtich stack to ram and copy sysinfo ram now
-
}
-