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author | Martin Roth <martin.roth@se-eng.com> | 2014-12-29 22:13:37 -0700 |
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committer | Martin Roth <gaumless@gmail.com> | 2015-01-04 21:28:57 +0100 |
commit | c3fde7ef361ca05ba82c218a57bd2bbe97bcde75 (patch) | |
tree | 9377d0116e4323a64da76b8dd7a9c89bac355a27 /src/mainboard/tyan/s2912_fam10/romstage.c | |
parent | c226bd62281ee16bd585a8e5af321c6ddfd22a19 (diff) | |
download | coreboot-c3fde7ef361ca05ba82c218a57bd2bbe97bcde75.tar.xz |
AMD Mainboards - romstage.c: Fix doxygen errors
- Remove types from the param declarations.
- list needed to be uppercase.
Change-Id: I8b9ed78908e5d3e1d99e7ba2ea9013be109b8e27
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/8072
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/tyan/s2912_fam10/romstage.c')
-rw-r--r-- | src/mainboard/tyan/s2912_fam10/romstage.c | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c index 6dae693ee8..3e0f8f3dbb 100644 --- a/src/mainboard/tyan/s2912_fam10/romstage.c +++ b/src/mainboard/tyan/s2912_fam10/romstage.c @@ -246,11 +246,9 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) * based on each device's unit count. * * Parameters: - * @param[in] u8 node = The node on which this chain is located - * @param[in] u8 link = The link on the host for this chain - * @param[out] u8** list = supply a pointer to a list - * @param[out] BOOL result = true to use a manual list - * false to initialize the link automatically + * @param[in] node = The node on which this chain is located + * @param[in] link = The link on the host for this chain + * @param[out] List = supply a pointer to a list */ BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List) { |