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| author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-03-27 22:49:18 -0500 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-04-01 22:53:55 +0200 |
| commit | 22564088c7ac48cfe03a61451d8f9d4b08dbe8b4 (patch) | |
| tree | caaa569df5429ab92d88b42ca3d1781974eb5194 /src/mainboard/tyan/s2912_fam10 | |
| parent | 3e91cffd894336c7ec802f0fc49e25e2a3b4efc6 (diff) | |
| download | coreboot-22564088c7ac48cfe03a61451d8f9d4b08dbe8b4.tar.xz | |
mainboards/amdfam10: Copy DIMM information to cbmem after romstage
src/northbridge/amd/amdfam10: Add amdmct_cbmem_store_info()
function.
Change-Id: I07376e276e3e9e3247d2576a09e58780d32a3a76
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/9138
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@gmail.com>
Diffstat (limited to 'src/mainboard/tyan/s2912_fam10')
| -rw-r--r-- | src/mainboard/tyan/s2912_fam10/romstage.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c index 933d709f11..fef8eccc66 100644 --- a/src/mainboard/tyan/s2912_fam10/romstage.c +++ b/src/mainboard/tyan/s2912_fam10/romstage.c @@ -237,6 +237,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) cbmem_initialize_empty(); post_code(0x41); + amdmct_cbmem_store_info(sysinfo); + timestamp_add_now(TS_END_ROMSTAGE); post_cache_as_ram(); // BSP switch stack to ram, copy then execute LB. |