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authorarch import user (historical) <svn@openbios.org>2005-07-06 16:49:52 +0000
committerarch import user (historical) <svn@openbios.org>2005-07-06 16:49:52 +0000
commit72c3b053d86c68a9e5454a79f0808c898170e21e (patch)
tree80fd2f9bfd9b0d22d1cc23685a65897c95ab62c3 /src/mainboard/tyan/s4880
parentfd6067425858d136418986fa77927a6ea76b79ee (diff)
downloadcoreboot-72c3b053d86c68a9e5454a79f0808c898170e21e.tar.xz
Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-7
Creator: Yinghai Lu <yhlu@tyan.com> ide_enable in MB Config and jmp_auto ( it will make start in the 64k boundary) git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1926 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s4880')
-rw-r--r--src/mainboard/tyan/s4880/Config.lb92
1 files changed, 38 insertions, 54 deletions
diff --git a/src/mainboard/tyan/s4880/Config.lb b/src/mainboard/tyan/s4880/Config.lb
index b9387cb700..d053c663f6 100644
--- a/src/mainboard/tyan/s4880/Config.lb
+++ b/src/mainboard/tyan/s4880/Config.lb
@@ -66,6 +66,17 @@ makerule ./auto.inc
end
##
+## Setup RAM
+##
+mainboardinit cpu/x86/fpu/enable_fpu.inc
+mainboardinit cpu/x86/mmx/enable_mmx.inc
+mainboardinit cpu/x86/sse/enable_sse.inc
+mainboardinit ./auto.inc
+mainboardinit cpu/x86/sse/disable_sse.inc
+mainboardinit cpu/x86/mmx/disable_mmx.inc
+mainboardinit arch/i386/lib/jmp_auto_out.inc
+
+##
## Build our 16 bit and 32 bit linuxBIOS entry code
##
mainboardinit cpu/x86/16bit/entry16.inc
@@ -107,26 +118,23 @@ end
### O.k. We aren't just an intermediary anymore!
###
-##
-## Setup RAM
-##
-mainboardinit cpu/x86/fpu/enable_fpu.inc
-mainboardinit cpu/x86/mmx/enable_mmx.inc
-mainboardinit cpu/x86/sse/enable_sse.inc
-mainboardinit ./auto.inc
-mainboardinit cpu/x86/sse/disable_sse.inc
-mainboardinit cpu/x86/mmx/disable_mmx.inc
+mainboardinit arch/i386/lib/jmp_auto.inc
##
## Include the secondary Configuration files
##
-dir /pc80
if CONFIG_CHIP_NAME
config chip.h
end
# sample config for tyan/s4880
chip northbridge/amd/amdk8/root_complex
+ device apic_cluster 0 on
+ chip cpu/amd/socket_940
+ device apic 0 on end
+ end
+ end
+
device pci_domain 0 on
chip northbridge/amd/amdk8
device pci 18.0 on end # LDT0
@@ -135,7 +143,17 @@ chip northbridge/amd/amdk8/root_complex
# devices on link 2, link 2 == LDT 2
chip southbridge/amd/amd8131
# the on/off keyword is mandatory
- device pci 0.0 on end
+ device pci 0.0 on
+ chip drivers/lsi/53c1030
+ device pci 4.0 on end
+ device pci 4.1 on end
+ register "fw_address" = "0xfff8c000"
+ end
+ chip drivers/pci/onboard
+ device pci 9.0 on end
+ device pci 9.1 on end
+ end
+ end
device pci 0.1 on end
device pci 1.0 on end
device pci 1.1 on end
@@ -148,6 +166,10 @@ chip northbridge/amd/amdk8/root_complex
device pci 0.1 on end
device pci 0.2 off end
device pci 1.0 off end
+ chip drivers/pci/onboard
+ device pci 6.0 on end
+ register "rom_address" = "0xfff80000"
+ end
end
device pci 1.0 on
chip superio/winbond/w83627hf
@@ -178,8 +200,8 @@ chip northbridge/amd/amdk8/root_complex
io 0x60 = 0x100
end
device pnp 2e.7 off # GAME_MIDI_GIPO1
- io 0x60 = 0x201
- io 0x62 = 0x330
+ io 0x60 = 0x220
+ io 0x62 = 0x300
irq 0x70 = 9
end
device pnp 2e.8 off end # GPIO2
@@ -196,6 +218,8 @@ chip northbridge/amd/amdk8/root_complex
device pci 1.3 on end
device pci 1.5 off end
device pci 1.6 off end
+ register "ide0_enable" = "1"
+ register "ide1_enable" = "1"
end
end # device pci 18.0
@@ -204,46 +228,6 @@ chip northbridge/amd/amdk8/root_complex
device pci 18.3 on end
end
- chip northbridge/amd/amdk8
- device pci 19.0 on end
- device pci 19.0 on end
- device pci 19.0 on end
- device pci 19.1 on end
- device pci 19.2 on end
- device pci 19.3 on end
- end
-
- chip northbridge/amd/amdk8
- device pci 1a.0 on end
- device pci 1a.0 on end
- device pci 1a.0 on end
- device pci 1a.1 on end
- device pci 1a.2 on end
- device pci 1a.3 on end
- end
-
- chip northbridge/amd/amdk8
- device pci 1b.0 on end
- device pci 1b.0 on end
- device pci 1b.0 on end
- device pci 1b.1 on end
- device pci 1b.2 on end
- device pci 1b.3 on end
- end
- end
- device apic_cluster 0 on
- chip cpu/amd/socket_940
- device apic 0 on end
- end
- chip cpu/amd/socket_940
- device apic 1 on end
- end
- chip cpu/amd/socket_940
- device apic 2 on end
- end
- chip cpu/amd/socket_940
- device apic 3 on end
- end
- end
+ end #pci_domain
end