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| author | Yinghai Lu <yinghailu@gmail.com> | 2006-10-04 20:46:15 +0000 |
|---|---|---|
| committer | Yinghai Lu <yinghailu@gmail.com> | 2006-10-04 20:46:15 +0000 |
| commit | d4b278c02c1da92219ebeb34204b9768934aeca3 (patch) | |
| tree | 488d097cac9744cfc9b8ff7c89ce69bcb21370cb /src/mainboard/tyan/s4880 | |
| parent | 2e3757d11c565a8fe68dc2a2c34975e98304533c (diff) | |
| download | coreboot-d4b278c02c1da92219ebeb34204b9768934aeca3.tar.xz | |
AMD Rev F support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2435 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s4880')
| -rw-r--r-- | src/mainboard/tyan/s4880/Options.lb | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/tyan/s4880/Options.lb b/src/mainboard/tyan/s4880/Options.lb index 9cc8fc84f8..9e74b11214 100644 --- a/src/mainboard/tyan/s4880/Options.lb +++ b/src/mainboard/tyan/s4880/Options.lb @@ -52,7 +52,7 @@ uses OBJCOPY uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN -uses K8_HW_MEM_HOLE_SIZEK +uses HW_MEM_HOLE_SIZEK uses USE_DCACHE_RAM uses DCACHE_RAM_BASE @@ -126,7 +126,7 @@ default CONFIG_LOGICAL_CPUS=1 default CONFIG_CHIP_NAME=1 #1G memory hole -default K8_HW_MEM_HOLE_SIZEK=0x100000 +default HW_MEM_HOLE_SIZEK=0x100000 #VGA Console default CONFIG_CONSOLE_VGA=1 @@ -139,7 +139,7 @@ default CONFIG_PCI_ROM_RUN=1 default USE_DCACHE_RAM=1 default DCACHE_RAM_BASE=0xcf000 default DCACHE_RAM_SIZE=0x1000 -default CONFIG_USE_INIT=1 +default CONFIG_USE_INIT=0 default ENABLE_APIC_EXT_ID=1 default APIC_ID_OFFSET=0x10 |