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author | Yinghai Lu <yinghailu@gmail.com> | 2004-10-20 05:07:16 +0000 |
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committer | Yinghai Lu <yinghailu@gmail.com> | 2004-10-20 05:07:16 +0000 |
commit | 6a61d6a4ae26d02844bf8043525d89b0ef9e0351 (patch) | |
tree | ffe2c7e2680ccb73502fe4129b9727051792dadb /src/mainboard/tyan/s4882/failover.c | |
parent | abed01d81d0c55848232a9ebd9bb4c55d036f45d (diff) | |
download | coreboot-6a61d6a4ae26d02844bf8043525d89b0ef9e0351.tar.xz |
Tyan update to work with new CPU Config
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1693 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s4882/failover.c')
-rw-r--r-- | src/mainboard/tyan/s4882/failover.c | 21 |
1 files changed, 6 insertions, 15 deletions
diff --git a/src/mainboard/tyan/s4882/failover.c b/src/mainboard/tyan/s4882/failover.c index b22abfea06..2f63cc85b7 100644 --- a/src/mainboard/tyan/s4882/failover.c +++ b/src/mainboard/tyan/s4882/failover.c @@ -4,22 +4,15 @@ #include <device/pci_ids.h> #include <arch/io.h> #include <arch/romcc_io.h> -#include <arch/smp/lapic.h> +#include <cpu/x86/lapic.h> #include "pc80/mc146818rtc_early.c" #include "southbridge/amd/amd8111/amd8111_enable_rom.c" #include "northbridge/amd/amdk8/early_ht.c" -#include "cpu/p6/boot_cpu.c" +#include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" -#define HAVE_REGPARM_SUPPORT 0 -#if HAVE_REGPARM_SUPPORT static unsigned long main(unsigned long bist) { -#else -static void main(void) -{ - unsigned long bist = 0; -#endif /* Make cerain my local apic is useable */ enable_lapic(); @@ -60,21 +53,19 @@ static void main(void) goto fallback_image; } normal_image: - asm("jmp __normal_image" + asm volatile ("jmp __normal_image" : /* outputs */ : "a" (bist) /* inputs */ : /* clobbers */ ); cpu_reset: - asm("jmp __cpu_reset" +#if 0 + asm volatile ("jmp __cpu_reset" : /* outputs */ : "a"(bist) /* inputs */ : /* clobbers */ ); +#endif fallback_image: -#if HAVE_REGPARM_SUPPORT return bist; -#else - return; -#endif } |