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author | Uwe Hermann <uwe@hermann-uwe.de> | 2010-11-21 22:47:22 +0000 |
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committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-11-21 22:47:22 +0000 |
commit | 7b997053eb2fcde464f5f6a1e5c85d1ffb6b4e32 (patch) | |
tree | 5339d014fbd29d3eb27cc82987eb7d655d9d8d1a /src/mainboard/tyan/s4882 | |
parent | 57b2ff886e0ce2c92820f5722c8031def3ac94cf (diff) | |
download | coreboot-7b997053eb2fcde464f5f6a1e5c85d1ffb6b4e32.tar.xz |
Simplify a few code chunks, fix whitespace and indentation.
Also, remove some less useful comments, some dead code / unused functions.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6108 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s4882')
-rw-r--r-- | src/mainboard/tyan/s4882/romstage.c | 30 |
1 files changed, 11 insertions, 19 deletions
diff --git a/src/mainboard/tyan/s4882/romstage.c b/src/mainboard/tyan/s4882/romstage.c index 152996fee4..7750750ca1 100644 --- a/src/mainboard/tyan/s4882/romstage.c +++ b/src/mainboard/tyan/s4882/romstage.c @@ -27,23 +27,22 @@ static void memreset_setup(void) { - if (is_cpu_pre_c0()) { - outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 16); //REVC_MEMRST_EN=0 - } - else { - outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 16); //REVC_MEMRST_EN=1 - } - outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 17); + if (is_cpu_pre_c0()) + outb((1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 16); //REVC_MEMRST_EN=0 + else + outb((1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 16); //REVC_MEMRST_EN=1 + outb((1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 17); } static void memreset(int controllers, const struct mem_controller *ctrl) { if (is_cpu_pre_c0()) { udelay(800); - outb((0<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 17); //REVB_MEMRST_L=1 + outb((1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 17); //REVB_MEMRST_L=1 udelay(90); } } + static inline void activate_spd_rom(const struct mem_controller *ctrl) { #define SMBUS_HUB 0x18 @@ -57,6 +56,7 @@ static inline void activate_spd_rom(const struct mem_controller *ctrl) smbus_write_byte(SMBUS_HUB, 0x03, 0); } + #if 0 static inline void change_i2c_mux(unsigned device) { @@ -81,7 +81,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/raminit.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "lib/generic_sdram.c" -#include "resourcemap.c" /* tyan does not want the default */ +#include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" #include <spd.h> #include "cpu/amd/car/post_cache_as_ram.c" @@ -112,24 +112,18 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) }; int needs_reset; - unsigned bsp_apicid = 0; - + unsigned bsp_apicid = 0, nodes; struct mem_controller ctrl[8]; - unsigned nodes; if (!cpu_init_detectedx && boot_cpu()) { /* Nothing special needs to be done to find bus 0 */ /* Allow the HT devices to be found */ - enumerate_ht_chain(); - amd8111_enable_rom(); } - if (bist == 0) { + if (bist == 0) bsp_apicid = init_cpus(cpu_init_detectedx); - } - w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); uart_init(); @@ -169,6 +163,4 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) sdram_initialize(nodes, ctrl); post_cache_as_ram(); - } - |