Since some people disapprove of white space cleanups mixed in regular commits

while others dislike them being extra commits, let's clean them up once and
for all for the existing code. If it's ugly, let it only be ugly once :-)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

5 files changed, 33 insertions, 33 deletions

diff --git a/src/mainboard/tyan/s4882/devicetree.cb b/src/mainboard/tyan/s4882/devicetree.cb
index d2e5bbcf90..66f8c73e00 100644
--- a/src/mainboard/tyan/s4882/devicetree.cb
+++ b/src/mainboard/tyan/s4882/devicetree.cb
@@ -7,11 +7,11 @@ chip northbridge/amd/amdk8/root_complex
 	device pci_domain 0 on
 		chip northbridge/amd/amdk8
 			device pci 18.0 on end # LDT0
-			device pci 18.0 on #  northbridge 
+			device pci 18.0 on #  northbridge
 				#  devices on link 1, link 1 == LDT 1
 				chip southbridge/amd/amd8131
 					# the on/off keyword is mandatory
-					device pci 0.0 on 
+					device pci 0.0 on
 #						chip drivers/lsi/53c1030
 #							device pci 4.0 on end
 #							device pci 4.1 on end
@@ -69,7 +69,7 @@ chip northbridge/amd/amdk8/root_complex
                 	                                        io 0x60 = 0x220
                 	                                        io 0x62 = 0x300
                 	                                        irq 0x70 = 9
-                	                                end  
+                	                                end
                 	                                device pnp 2e.8 off end #  GPIO2
                 	                                device pnp 2e.9 off end #  GPIO3
                 	                                device pnp 2e.a off end #  ACPI
@@ -81,12 +81,12 @@ chip northbridge/amd/amdk8/root_complex
 					end
 					device pci 1.1 on end
 					device pci 1.2 on end
-                                        device pci 1.3 on 
+                                        device pci 1.3 on
 #                                                chip drivers/i2c/i2cmux # pca9556 smbus mux
 #                                                        device i2c 18 on #0 pca9516 2, 1
 #	  					                chip drivers/i2c/lm63 #cpu0 temp
 #                                                                        device i2c 4c on end
-#                                                                end 
+#                                                                end
 #							end
 #                                                        device i2c 18 on #1 pca9516 1, 1
 #                                                                chip drivers/generic/generic #dimm 1-0-0
@@ -163,7 +163,7 @@ chip northbridge/amd/amdk8/root_complex
 #                                                chip drivers/i2c/adm1027 # ADM1027 CPU1 vid and System FAN...
 #                                                        device i2c 2e on end
 #                                                end
-#                                                chip drivers/generic/generic # Winbond HWM 0x54 CPU0 vid 
+#                                                chip drivers/generic/generic # Winbond HWM 0x54 CPU0 vid
 #                                                        device i2c 2a on end
 #                                                end
 #                                                chip drivers/generic/generic # Winbond HWM 0x92
@@ -181,16 +181,16 @@ chip northbridge/amd/amdk8/root_complex
 					register "ide0_enable" = "1"
                                         register "ide1_enable" = "1"
 				end
-			end #  device pci 18.0 
-			
+			end #  device pci 18.0
+
                 	device pci 18.0 on end
-			
+
 			device pci 18.1 on end
 			device pci 18.2 on end
 			device pci 18.3 on end
 		end
 
-	end 
+	end
 #        chip drivers/generic/debug
 #                device pnp 0.0 off end # chip name
 #                device pnp 0.1 off end # pci_regs_all
diff --git a/src/mainboard/tyan/s4882/irq_tables.c b/src/mainboard/tyan/s4882/irq_tables.c
index 4552b1f69c..92695abf7b 100644
--- a/src/mainboard/tyan/s4882/irq_tables.c
+++ b/src/mainboard/tyan/s4882/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
diff --git a/src/mainboard/tyan/s4882/mptable.c b/src/mainboard/tyan/s4882/mptable.c
index 4022dbdde1..81364262b7 100644
--- a/src/mainboard/tyan/s4882/mptable.c
+++ b/src/mainboard/tyan/s4882/mptable.c
@@ -29,7 +29,7 @@ static unsigned node_link_to_bus(unsigned node, unsigned link)
                 dst_node = (config_map >> 4) & 7;
                 dst_link = (config_map >> 8) & 3;
                 bus_base = (config_map >> 16) & 0xff;
-#if 0                           
+#if 0
                 printk(BIOS_DEBUG, "node.link=bus: %d.%d=%d 0x%2x->0x%08x\n",
                         dst_node, dst_link, bus_base,
                         reg, config_map);
@@ -59,7 +59,7 @@ static void *smp_write_config_table(void *v)
         unsigned apicid_8111;
         unsigned apicid_8131_1;
         unsigned apicid_8131_2;
-  
+
         mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
         memset(mc, 0, sizeof(*mc));
 
@@ -79,24 +79,24 @@ static void *smp_write_config_table(void *v)
 
         smp_write_processors(mc);
 
-       
+
         {
                 device_t dev;
-               
+
                 /* HT chain 0 */
                 bus_chain_0 = node_link_to_bus(0, 1);
                 if (bus_chain_0 == 0) {
                         printk(BIOS_DEBUG, "ERROR - cound not find bus for node 0 chain 0, using defaults\n");
                         bus_chain_0 = 1;
                 }
- 
+
                 /* 8111 */
                 dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x03,0));
                 if (dev) {
                         bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
                         bus_isa    = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
-                        bus_isa++; 
-                }       
+                        bus_isa++;
+                }
                 else {
                         printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
 
@@ -134,14 +134,14 @@ static void *smp_write_config_table(void *v)
         }
         smp_write_bus(mc, bus_isa, "ISA   ");
 
-	
+
 /*I/O APICs:	APIC ID	Version	State		Address*/
 #if CONFIG_LOGICAL_CPUS==1
 	apicid_base = get_apicid_base(3);
-#else        
-        apicid_base = CONFIG_MAX_PHYSICAL_CPUS; 
+#else
+        apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
 #endif
-        apicid_8111 = apicid_base+0; 
+        apicid_8111 = apicid_base+0;
         apicid_8131_1 = apicid_base+1;
         apicid_8131_2 = apicid_base+2;
 	smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000);
@@ -164,7 +164,7 @@ static void *smp_write_config_table(void *v)
                 }
 
 	}
-  
+
 /*I/O Ints:	Type	Polarity    Trigger	Bus ID	 IRQ	APIC ID	PIN#
 */	smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_8111, 0x0);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x1, apicid_8111, 0x1);
@@ -182,7 +182,7 @@ static void *smp_write_config_table(void *v)
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xd, apicid_8111, 0xd);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xe, apicid_8111, 0xe);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xf, apicid_8111, 0xf);
-	
+
 
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_chain_0, (4<<2)|0, apicid_8111, 0x13);
 
@@ -214,7 +214,7 @@ static void *smp_write_config_table(void *v)
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (3<<2)|2, apicid_8131_1, 0x1);//
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (3<<2)|3, apicid_8131_1, 0x2);//
 
-//Slot 3 PCIX 100/66        
+//Slot 3 PCIX 100/66
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (2<<2)|0, apicid_8131_1, 0x2);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (2<<2)|1, apicid_8131_1, 0x3);//
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (2<<2)|2, apicid_8131_1, 0x0);//
diff --git a/src/mainboard/tyan/s4882/resourcemap.c b/src/mainboard/tyan/s4882/resourcemap.c
index 0e5be61a7c..2ee274960d 100644
--- a/src/mainboard/tyan/s4882/resourcemap.c
+++ b/src/mainboard/tyan/s4882/resourcemap.c
@@ -144,7 +144,7 @@ static void setup_s4882_resource_map(void)
 	 *	   1 = base/limit registers i are read-only
 	 * [ 7: 4] Reserved
 	 * [31: 8] Memory-Mapped I/O Base Address i (39-16)
-	 *	   This field defines the upper address bits of a 40bit address 
+	 *	   This field defines the upper address bits of a 40bit address
 	 *	   that defines the start of memory-mapped I/O region i
 	 */
 	PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,
@@ -200,7 +200,7 @@ static void setup_s4882_resource_map(void)
 	 * [ 3: 2] Reserved
 	 * [ 4: 4] VGA Enable
 	 *	   0 = VGA matches Disabled
-	 *	   1 = matches all address < 64K and where A[9:0] is in the 
+	 *	   1 = matches all address < 64K and where A[9:0] is in the
 	 *	       range 3B0-3BB or 3C0-3DF independen of the base & limit registers
 	 * [ 5: 5] ISA Enable
 	 *	   0 = ISA matches Disabled
@@ -208,7 +208,7 @@ static void setup_s4882_resource_map(void)
 	 *	       from matching agains this base/limit pair
 	 * [11: 6] Reserved
 	 * [24:12] PCI I/O Base i
-	 *	   This field defines the start of PCI I/O region n 
+	 *	   This field defines the start of PCI I/O region n
 	 * [31:25] Reserved
 	 */
 	PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000003,
diff --git a/src/mainboard/tyan/s4882/romstage.c b/src/mainboard/tyan/s4882/romstage.c
index e1931fc2d4..9bec9de58b 100644
--- a/src/mainboard/tyan/s4882/romstage.c
+++ b/src/mainboard/tyan/s4882/romstage.c
@@ -1,4 +1,4 @@
- 
+
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
@@ -70,7 +70,7 @@ static inline void change_i2c_mux(unsigned device)
 {
 #define SMBUS_HUB 0x18
         int ret, i;
-        print_debug("change_i2c_mux i="); print_debug_hex8(device); print_debug("\n"); 
+        print_debug("change_i2c_mux i="); print_debug_hex8(device); print_debug("\n");
         i=2;
         do {
                 ret = smbus_write_byte(SMBUS_HUB, 0x01, device);
@@ -93,7 +93,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "lib/generic_sdram.c"
 
  /* tyan does not want the default */
-#include "resourcemap.c" 
+#include "resourcemap.c"
 
 #if CONFIG_LOGICAL_CPUS==1
 #define SET_NB_CFG_54 1
@@ -155,7 +155,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
                 bsp_apicid = init_cpus(cpu_init_detectedx);
         }
 
-	
+
  	w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
         uart_init();
         console_init();
@@ -187,7 +187,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         nodes = get_nodes();
         //It's the time to set ctrl now;
         fill_mem_ctrl(nodes, ctrl, spd_addr);
-	
+
 	enable_smbus();
 
 	memreset_setup();