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authorStefan Reinauer <stepan@coresystems.de>2010-02-08 12:20:50 +0000
committerStefan Reinauer <stepan@openbios.org>2010-02-08 12:20:50 +0000
commit38f147ed3d9fdd6bfb23d7226f6fdd3fc5db53d0 (patch)
treeecb680abac7c73798a4abf5f5733c6ad3e179bb4 /src/mainboard/tyan
parentd51eddbb6611965165ad72eb3fb04377a51ab64a (diff)
downloadcoreboot-38f147ed3d9fdd6bfb23d7226f6fdd3fc5db53d0.tar.xz
janitor task: unify and cleanup naming.
cache_as_ram_auto.c and auto.c are both called "romstage.c" now. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5092 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan')
-rw-r--r--src/mainboard/tyan/s1846/romstage.c (renamed from src/mainboard/tyan/s1846/auto.c)0
-rw-r--r--src/mainboard/tyan/s2735/Makefile.inc6
-rw-r--r--src/mainboard/tyan/s2735/reset.c2
-rw-r--r--src/mainboard/tyan/s2735/romstage.c (renamed from src/mainboard/tyan/s2735/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/tyan/s2850/romstage.c (renamed from src/mainboard/tyan/s2850/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/tyan/s2875/romstage.c (renamed from src/mainboard/tyan/s2875/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/tyan/s2880/romstage.c (renamed from src/mainboard/tyan/s2880/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/tyan/s2881/romstage.c (renamed from src/mainboard/tyan/s2881/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/tyan/s2882/romstage.c (renamed from src/mainboard/tyan/s2882/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/tyan/s2885/romstage.c (renamed from src/mainboard/tyan/s2885/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/tyan/s2891/romstage.c (renamed from src/mainboard/tyan/s2891/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/tyan/s2892/romstage.c (renamed from src/mainboard/tyan/s2892/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/tyan/s2895/romstage.c (renamed from src/mainboard/tyan/s2895/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/tyan/s2912/Makefile.inc12
-rw-r--r--src/mainboard/tyan/s2912/romstage.c (renamed from src/mainboard/tyan/s2912/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/tyan/s2912_fam10/Makefile.inc12
-rw-r--r--src/mainboard/tyan/s2912_fam10/romstage.c (renamed from src/mainboard/tyan/s2912_fam10/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/tyan/s2912_fam10/spd_addr.h2
-rw-r--r--src/mainboard/tyan/s4880/romstage.c (renamed from src/mainboard/tyan/s4880/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/tyan/s4882/romstage.c (renamed from src/mainboard/tyan/s4882/cache_as_ram_auto.c)0
20 files changed, 17 insertions, 17 deletions
diff --git a/src/mainboard/tyan/s1846/auto.c b/src/mainboard/tyan/s1846/romstage.c
index be6e43b0e6..be6e43b0e6 100644
--- a/src/mainboard/tyan/s1846/auto.c
+++ b/src/mainboard/tyan/s1846/romstage.c
diff --git a/src/mainboard/tyan/s2735/Makefile.inc b/src/mainboard/tyan/s2735/Makefile.inc
index 027dd1fd34..27b522a01f 100644
--- a/src/mainboard/tyan/s2735/Makefile.inc
+++ b/src/mainboard/tyan/s2735/Makefile.inc
@@ -40,7 +40,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/x86/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -58,8 +58,8 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.dsl
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/tyan/s2735/reset.c b/src/mainboard/tyan/s2735/reset.c
index bffb0389a8..371920dca2 100644
--- a/src/mainboard/tyan/s2735/reset.c
+++ b/src/mainboard/tyan/s2735/reset.c
@@ -1,6 +1,6 @@
void i82801er_hard_reset(void);
-/* FIXME: There's another hard_reset() in cache_as_ram_auto.c. Why? */
+/* FIXME: There's another hard_reset() in romstage.c. Why? */
void hard_reset(void)
{
i82801er_hard_reset();
diff --git a/src/mainboard/tyan/s2735/cache_as_ram_auto.c b/src/mainboard/tyan/s2735/romstage.c
index 99a38a9fb3..99a38a9fb3 100644
--- a/src/mainboard/tyan/s2735/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2735/romstage.c
diff --git a/src/mainboard/tyan/s2850/cache_as_ram_auto.c b/src/mainboard/tyan/s2850/romstage.c
index 352feadf70..352feadf70 100644
--- a/src/mainboard/tyan/s2850/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2850/romstage.c
diff --git a/src/mainboard/tyan/s2875/cache_as_ram_auto.c b/src/mainboard/tyan/s2875/romstage.c
index 50b12f1ff6..50b12f1ff6 100644
--- a/src/mainboard/tyan/s2875/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2875/romstage.c
diff --git a/src/mainboard/tyan/s2880/cache_as_ram_auto.c b/src/mainboard/tyan/s2880/romstage.c
index c97f3b7708..c97f3b7708 100644
--- a/src/mainboard/tyan/s2880/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2880/romstage.c
diff --git a/src/mainboard/tyan/s2881/cache_as_ram_auto.c b/src/mainboard/tyan/s2881/romstage.c
index 9d5edcb462..9d5edcb462 100644
--- a/src/mainboard/tyan/s2881/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2881/romstage.c
diff --git a/src/mainboard/tyan/s2882/cache_as_ram_auto.c b/src/mainboard/tyan/s2882/romstage.c
index cdea6933ed..cdea6933ed 100644
--- a/src/mainboard/tyan/s2882/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2882/romstage.c
diff --git a/src/mainboard/tyan/s2885/cache_as_ram_auto.c b/src/mainboard/tyan/s2885/romstage.c
index d561e033c6..d561e033c6 100644
--- a/src/mainboard/tyan/s2885/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2885/romstage.c
diff --git a/src/mainboard/tyan/s2891/cache_as_ram_auto.c b/src/mainboard/tyan/s2891/romstage.c
index 9ace5e30ae..9ace5e30ae 100644
--- a/src/mainboard/tyan/s2891/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2891/romstage.c
diff --git a/src/mainboard/tyan/s2892/cache_as_ram_auto.c b/src/mainboard/tyan/s2892/romstage.c
index e94017e532..e94017e532 100644
--- a/src/mainboard/tyan/s2892/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2892/romstage.c
diff --git a/src/mainboard/tyan/s2895/cache_as_ram_auto.c b/src/mainboard/tyan/s2895/romstage.c
index 78ddd1c6a3..78ddd1c6a3 100644
--- a/src/mainboard/tyan/s2895/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2895/romstage.c
diff --git a/src/mainboard/tyan/s2912/Makefile.inc b/src/mainboard/tyan/s2912/Makefile.inc
index 7ca52cccd3..4da637b84a 100644
--- a/src/mainboard/tyan/s2912/Makefile.inc
+++ b/src/mainboard/tyan/s2912/Makefile.inc
@@ -25,7 +25,7 @@ driver-y += mainboard.o
obj-y += get_bus_conf.o
obj-$(CONFIG_GENERATE_MP_TABLE) += mptable.o
obj-$(CONFIG_GENERATE_PIRQ_TABLE) += irq_tables.o
-obj-$(CONFIG_USE_INIT) += cache_as_ram_auto.o
+obj-$(CONFIG_USE_INIT) += romstage.o
obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o
# This is part of the conversion to init-obj and away from included code.
@@ -36,7 +36,7 @@ crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -57,11 +57,11 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/tyan/s2912/cache_as_ram_auto.c b/src/mainboard/tyan/s2912/romstage.c
index ce466306ce..ce466306ce 100644
--- a/src/mainboard/tyan/s2912/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2912/romstage.c
diff --git a/src/mainboard/tyan/s2912_fam10/Makefile.inc b/src/mainboard/tyan/s2912_fam10/Makefile.inc
index 9e6bad7132..8d0dfbe13a 100644
--- a/src/mainboard/tyan/s2912_fam10/Makefile.inc
+++ b/src/mainboard/tyan/s2912_fam10/Makefile.inc
@@ -25,14 +25,14 @@ driver-y += mainboard.o
obj-y += get_bus_conf.o
obj-$(CONFIG_GENERATE_MP_TABLE) += mptable.o
obj-$(CONFIG_GENERATE_PIRQ_TABLE) += irq_tables.o
-obj-$(CONFIG_USE_INIT) += cache_as_ram_auto.o
+obj-$(CONFIG_USE_INIT) += romstage.o
obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o
# This is part of the conversion to init-obj and away from included code.
initobj-y += crt0.o
crt0s := $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/32bit/entry32.lds
@@ -50,11 +50,11 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/tyan/s2912_fam10/cache_as_ram_auto.c b/src/mainboard/tyan/s2912_fam10/romstage.c
index 1216c298b9..1216c298b9 100644
--- a/src/mainboard/tyan/s2912_fam10/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2912_fam10/romstage.c
diff --git a/src/mainboard/tyan/s2912_fam10/spd_addr.h b/src/mainboard/tyan/s2912_fam10/spd_addr.h
index 915ee8bd7c..a8abf331ee 100644
--- a/src/mainboard/tyan/s2912_fam10/spd_addr.h
+++ b/src/mainboard/tyan/s2912_fam10/spd_addr.h
@@ -19,7 +19,7 @@
/**
* This file defines the SPD addresses for the mainboard. Must be included in
- * cache_as_ram_auto.c
+ * romstage.c
*/
#define RC00 0
diff --git a/src/mainboard/tyan/s4880/cache_as_ram_auto.c b/src/mainboard/tyan/s4880/romstage.c
index 9f38ec1992..9f38ec1992 100644
--- a/src/mainboard/tyan/s4880/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s4880/romstage.c
diff --git a/src/mainboard/tyan/s4882/cache_as_ram_auto.c b/src/mainboard/tyan/s4882/romstage.c
index 1c8d3b42fe..1c8d3b42fe 100644
--- a/src/mainboard/tyan/s4882/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s4882/romstage.c