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authorStefan Reinauer <stepan@coresystems.de>2010-05-25 17:09:05 +0000
committerStefan Reinauer <stepan@openbios.org>2010-05-25 17:09:05 +0000
commit7e00a44b773ba16b72fa1ca69825407be0c98ad5 (patch)
tree57c5c75b90ccf375ae4cc30cc58581b8b301a6ca /src/mainboard/tyan
parent75a05dc0b91fb5748bb4f8b0eee9cee168c2cda1 (diff)
downloadcoreboot-7e00a44b773ba16b72fa1ca69825407be0c98ad5.tar.xz
also rename the config option.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5588 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan')
-rw-r--r--src/mainboard/tyan/s2912/ap_romstage.c2
-rw-r--r--src/mainboard/tyan/s2912/romstage.c4
-rw-r--r--src/mainboard/tyan/s2912_fam10/romstage.c4
3 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/tyan/s2912/ap_romstage.c b/src/mainboard/tyan/s2912/ap_romstage.c
index 41a4a6ee8d..1dff142369 100644
--- a/src/mainboard/tyan/s2912/ap_romstage.c
+++ b/src/mainboard/tyan/s2912/ap_romstage.c
@@ -78,7 +78,7 @@ void hardwaremain(int ret_addr)
id = get_node_core_id_x();
- //FIXME: for USBDEBUG_DIRECT you need to make sure dbg_info get assigned in AP
+ //FIXME: for USBDEBUG you need to make sure dbg_info get assigned in AP
print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n");
train_ram(id.nodeid, sysinfo, sysinfox);
diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c
index cb2a2e0d4e..822474bcf9 100644
--- a/src/mainboard/tyan/s2912/romstage.c
+++ b/src/mainboard/tyan/s2912/romstage.c
@@ -52,7 +52,7 @@
#include "pc80/mc146818rtc_early.c"
#include <console/console.h>
-#if CONFIG_USBDEBUG_DIRECT
+#if CONFIG_USBDEBUG
#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c"
#include "pc80/usbdebug_serial.c"
#endif
@@ -192,7 +192,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
-#if CONFIG_USBDEBUG_DIRECT
+#if CONFIG_USBDEBUG
mcp55_enable_usbdebug(DBGP_DEFAULT);
early_usbdebug_init();
#endif
diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c
index 27d51aba25..05beb124f7 100644
--- a/src/mainboard/tyan/s2912_fam10/romstage.c
+++ b/src/mainboard/tyan/s2912_fam10/romstage.c
@@ -45,7 +45,7 @@
#include <cpu/x86/lapic.h>
#include "option_table.h"
#include <console/console.h>
-#if CONFIG_USBDEBUG_DIRECT
+#if CONFIG_USBDEBUG
#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c"
#include "pc80/usbdebug_serial.c"
#endif
@@ -180,7 +180,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
-#if CONFIG_USBDEBUG_DIRECT
+#if CONFIG_USBDEBUG
mcp55_enable_usbdebug(DBGP_DEFAULT);
early_usbdebug_init();
#endif