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| author | arch import user (historical) <svn@openbios.org> | 2005-07-06 17:23:57 +0000 |
|---|---|---|
| committer | arch import user (historical) <svn@openbios.org> | 2005-07-06 17:23:57 +0000 |
| commit | 4d8620eecb35178b73e703afe779b894db723af0 (patch) | |
| tree | f950a6a8d2f91fa611187375152990bd6b97a0af /src/mainboard/tyan | |
| parent | 54d6b08f010d2dc458184a4845f8fbdaaf0da429 (diff) | |
| download | coreboot-4d8620eecb35178b73e703afe779b894db723af0.tar.xz | |
Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-55
Creator: Yinghai Lu <yhlu@tyan.com>
intel car to x86 car
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1971 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan')
| -rw-r--r-- | src/mainboard/tyan/s2735/Config.lb | 4 | ||||
| -rw-r--r-- | src/mainboard/tyan/s2735/cache_as_ram_auto.c | 6 | ||||
| -rw-r--r-- | src/mainboard/tyan/s2880/Config.lb | 10 |
3 files changed, 10 insertions, 10 deletions
diff --git a/src/mainboard/tyan/s2735/Config.lb b/src/mainboard/tyan/s2735/Config.lb index 37d6493e74..568bc9b211 100644 --- a/src/mainboard/tyan/s2735/Config.lb +++ b/src/mainboard/tyan/s2735/Config.lb @@ -101,7 +101,7 @@ if USE_DCACHE_RAM end if CONFIG_USE_INIT - ldscript /cpu/intel/car/cache_as_ram.lds + ldscript /cpu/x86/car/cache_as_ram.lds end end @@ -133,7 +133,7 @@ if USE_DCACHE_RAM ## ## Setup Cache-As-Ram ## -mainboardinit cpu/intel/car/cache_as_ram.inc +mainboardinit cpu/x86/car/cache_as_ram.inc end ### diff --git a/src/mainboard/tyan/s2735/cache_as_ram_auto.c b/src/mainboard/tyan/s2735/cache_as_ram_auto.c index a0c95ab46c..4fdf8b5190 100644 --- a/src/mainboard/tyan/s2735/cache_as_ram_auto.c +++ b/src/mainboard/tyan/s2735/cache_as_ram_auto.c @@ -80,7 +80,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "sdram/generic_sdram.c" -#include "cpu/intel/car/copy_and_run.c" +#include "cpu/x86/car/copy_and_run.c" #if USE_FALLBACK_IMAGE == 1 @@ -295,11 +295,11 @@ cpu_reset_x: if(cpu_reset==0) { #define CLEAR_FIRST_1M_RAM 1 -#include "cpu/intel/car/cache_as_ram_post.c" +#include "cpu/x86/car/cache_as_ram_post.c" } else { #undef CLEAR_FIRST_1M_RAM -#include "cpu/intel/car/cache_as_ram_post.c" +#include "cpu/x86/car/cache_as_ram_post.c" } __asm__ volatile ( diff --git a/src/mainboard/tyan/s2880/Config.lb b/src/mainboard/tyan/s2880/Config.lb index f82bd23b44..6c4ac7b7c1 100644 --- a/src/mainboard/tyan/s2880/Config.lb +++ b/src/mainboard/tyan/s2880/Config.lb @@ -143,11 +143,11 @@ chip northbridge/amd/amdk8/root_complex device pci 9.0 on end #broadcom device pci 9.1 on end end - chip drivers/lsi/53c1030 - device pci a.0 on end - device pci a.1 on end - register "fw_address" = "0xfff8c000" - end +# chip drivers/lsi/53c1030 +# device pci a.0 on end +# device pci a.1 on end +# register "fw_address" = "0xfff8c000" +# end end device pci 0.1 on end device pci 1.0 on end |