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author | Duncan Laurie <dlaurie@chromium.org> | 2013-09-16 13:51:08 -0700 |
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committer | Patrick Georgi <patrick@georgi-clan.de> | 2014-07-05 10:12:07 +0200 |
commit | 88c873a07ecff2c6f5ec04d178251315cf01e06a (patch) | |
tree | 1ed8949af9ff3b00a483e2005482016ee23f32a0 /src/mainboard/tyan | |
parent | 779e178353a1adb6e6bee8fcad688bcbceb172cf (diff) | |
download | coreboot-88c873a07ecff2c6f5ec04d178251315cf01e06a.tar.xz |
intel/lynxpoint: xhci: Port reset changes on suspend/resume
Some USB3 devices are not showing up after suspend/resume cycles.
In particular if a device uses a lower power state like U2 it may
take longer to come up and the firmware needs to wait after sending
a warm port reset.
In addition skipping port reset to connected ports in the way into
suspend was causing problems so instead send all ports a reset
before suspend.
BUG=chrome-os-partner:22402
BRANCH=falco,peppy,leon,wolf
TEST=manual:
Suspend/resume with ADATA HE720 HDD (and other devices) both
connected at suspend and connecting while in suspend and ensure
that the devices always show up in the kernel.
Change-Id: Ib7b15dc65792742b4ceb7dcfc4b2c83192eafcc2
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/169548
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/6015
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/mainboard/tyan')
0 files changed, 0 insertions, 0 deletions