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| author | Eric Biederman <ebiederm@xmission.com> | 2004-10-23 03:00:02 +0000 |
|---|---|---|
| committer | Eric Biederman <ebiederm@xmission.com> | 2004-10-23 03:00:02 +0000 |
| commit | 8e2847c28ef57cf1ee49653dabee6bd3ed1f2525 (patch) | |
| tree | fd936a31ab5705f975ac4fd116621477be33aa13 /src/mainboard/tyan | |
| parent | 60216355d21fae62daf00afa66443b03ed743e2a (diff) | |
| download | coreboot-8e2847c28ef57cf1ee49653dabee6bd3ed1f2525.tar.xz | |
- For now use port 0x80 based delays in for the e7501 memory initialization.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1712 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan')
| -rw-r--r-- | src/mainboard/tyan/s2735/auto.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/tyan/s2735/auto.c b/src/mainboard/tyan/s2735/auto.c index 0b037142f7..091e74f321 100644 --- a/src/mainboard/tyan/s2735/auto.c +++ b/src/mainboard/tyan/s2735/auto.c @@ -14,8 +14,10 @@ #include "ram/ramtest.c" #include "southbridge/intel/i82801er/i82801er_early_smbus.c" #include "northbridge/intel/e7501/raminit.h" +#if 0 #include "cpu/intel/model_f2x/apic_timer.c" #include "lib/delay.c" +#endif #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/intel/e7501/debug.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c" |