first round name simplification. drop the <component>_ prefix.

the prefix was introduced in the early v2 tree many years ago
because our old build system "newconfig" could not handle two files with
the same name in different paths like /path/to/usb.c and
/another/path/to/usb.c correctly. Only one of the files would end up
being compiled into the final image.

Since Kconfig (actually since shortly before we switched to Kconfig) we
don't suffer from that problem anymore. So we could drop the sb700_
prefix from all those filenames (or, the <componentname>_ prefix in general)

- makes it easier to fork off a new chipset
- makes it easier to diff against other chipsets
- storing redundant information in filenames seems wrong

Signed-off-by: <stepan@coresystems.de>

Acked-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6149 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

14 files changed, 34 insertions, 34 deletions

diff --git a/src/mainboard/tyan/s2735/romstage.c b/src/mainboard/tyan/s2735/romstage.c
index c7c5eb036a..eaddf9a290 100644
--- a/src/mainboard/tyan/s2735/romstage.c
+++ b/src/mainboard/tyan/s2735/romstage.c
@@ -9,7 +9,7 @@
 #include <console/console.h>
 #include <lib.h>
 #include <spd.h>
-#include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
+#include "southbridge/intel/i82801ex/early_smbus.c"
 #include "northbridge/intel/e7501/raminit.h"
 #include "northbridge/intel/e7501/debug.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
diff --git a/src/mainboard/tyan/s2850/romstage.c b/src/mainboard/tyan/s2850/romstage.c
index b7f0716796..a45d6dfa1c 100644
--- a/src/mainboard/tyan/s2850/romstage.c
+++ b/src/mainboard/tyan/s2850/romstage.c
@@ -12,7 +12,7 @@
 #include <spd.h>
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "southbridge/amd/amd8111/amd8111_early_smbus.c"
+#include "southbridge/amd/amd8111/early_smbus.c"
 #include "northbridge/amd/amdk8/raminit.h"
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
@@ -23,7 +23,7 @@
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"
 #include "northbridge/amd/amdk8/setup_resource_map.c"
-#include "southbridge/amd/amd8111/amd8111_early_ctrl.c"
+#include "southbridge/amd/amd8111/early_ctrl.c"
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
 
diff --git a/src/mainboard/tyan/s2875/romstage.c b/src/mainboard/tyan/s2875/romstage.c
index db54927e9b..7681e88f31 100644
--- a/src/mainboard/tyan/s2875/romstage.c
+++ b/src/mainboard/tyan/s2875/romstage.c
@@ -12,7 +12,7 @@
 #include <spd.h>
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "southbridge/amd/amd8111/amd8111_early_smbus.c"
+#include "southbridge/amd/amd8111/early_smbus.c"
 #include "northbridge/amd/amdk8/raminit.h"
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
@@ -23,7 +23,7 @@
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"
 #include "northbridge/amd/amdk8/setup_resource_map.c"
-#include "southbridge/amd/amd8111/amd8111_early_ctrl.c"
+#include "southbridge/amd/amd8111/early_ctrl.c"
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
 
diff --git a/src/mainboard/tyan/s2880/romstage.c b/src/mainboard/tyan/s2880/romstage.c
index 2ab663b0d1..a1312659f8 100644
--- a/src/mainboard/tyan/s2880/romstage.c
+++ b/src/mainboard/tyan/s2880/romstage.c
@@ -12,7 +12,7 @@
 #include <spd.h>
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "southbridge/amd/amd8111/amd8111_early_smbus.c"
+#include "southbridge/amd/amd8111/early_smbus.c"
 #include "northbridge/amd/amdk8/raminit.h"
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
@@ -23,7 +23,7 @@
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"
 #include "northbridge/amd/amdk8/setup_resource_map.c"
-#include "southbridge/amd/amd8111/amd8111_early_ctrl.c"
+#include "southbridge/amd/amd8111/early_ctrl.c"
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
 
diff --git a/src/mainboard/tyan/s2881/romstage.c b/src/mainboard/tyan/s2881/romstage.c
index 6645c9de24..22f24bbd18 100644
--- a/src/mainboard/tyan/s2881/romstage.c
+++ b/src/mainboard/tyan/s2881/romstage.c
@@ -11,7 +11,7 @@
 #include <spd.h>
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "southbridge/amd/amd8111/amd8111_early_smbus.c"
+#include "southbridge/amd/amd8111/early_smbus.c"
 #include "northbridge/amd/amdk8/raminit.h"
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
@@ -22,7 +22,7 @@
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"
 #include "northbridge/amd/amdk8/setup_resource_map.c"
-#include "southbridge/amd/amd8111/amd8111_early_ctrl.c"
+#include "southbridge/amd/amd8111/early_ctrl.c"
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
 
diff --git a/src/mainboard/tyan/s2882/romstage.c b/src/mainboard/tyan/s2882/romstage.c
index 2ab663b0d1..a1312659f8 100644
--- a/src/mainboard/tyan/s2882/romstage.c
+++ b/src/mainboard/tyan/s2882/romstage.c
@@ -12,7 +12,7 @@
 #include <spd.h>
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "southbridge/amd/amd8111/amd8111_early_smbus.c"
+#include "southbridge/amd/amd8111/early_smbus.c"
 #include "northbridge/amd/amdk8/raminit.h"
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
@@ -23,7 +23,7 @@
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"
 #include "northbridge/amd/amdk8/setup_resource_map.c"
-#include "southbridge/amd/amd8111/amd8111_early_ctrl.c"
+#include "southbridge/amd/amd8111/early_ctrl.c"
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
 
diff --git a/src/mainboard/tyan/s2885/romstage.c b/src/mainboard/tyan/s2885/romstage.c
index a4b7d076d1..963ba1b7ef 100644
--- a/src/mainboard/tyan/s2885/romstage.c
+++ b/src/mainboard/tyan/s2885/romstage.c
@@ -11,7 +11,7 @@
 #include <spd.h>
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "southbridge/amd/amd8111/amd8111_early_smbus.c"
+#include "southbridge/amd/amd8111/early_smbus.c"
 #include "northbridge/amd/amdk8/raminit.h"
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
@@ -22,7 +22,7 @@
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"
 #include "northbridge/amd/amdk8/setup_resource_map.c"
-#include "southbridge/amd/amd8111/amd8111_early_ctrl.c"
+#include "southbridge/amd/amd8111/early_ctrl.c"
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
 
diff --git a/src/mainboard/tyan/s2891/romstage.c b/src/mainboard/tyan/s2891/romstage.c
index 39bdc65e7e..c059592e8d 100644
--- a/src/mainboard/tyan/s2891/romstage.c
+++ b/src/mainboard/tyan/s2891/romstage.c
@@ -11,7 +11,7 @@
 #include <spd.h>
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "southbridge/nvidia/ck804/ck804_early_smbus.h"
+#include "southbridge/nvidia/ck804/early_smbus.h"
 #include "northbridge/amd/amdk8/raminit.h"
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
@@ -39,8 +39,8 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "lib/generic_sdram.c"
 #include "resourcemap.c"
 #include "cpu/amd/dualcore/dualcore.c"
-#include "southbridge/nvidia/ck804/ck804_early_setup_ss.h"
-#include "southbridge/nvidia/ck804/ck804_early_setup.c"
+#include "southbridge/nvidia/ck804/early_setup_ss.h"
+#include "southbridge/nvidia/ck804/early_setup.c"
 #include "cpu/amd/car/post_cache_as_ram.c"
 #include "cpu/amd/model_fxx/init_cpus.c"
 #include "northbridge/amd/amdk8/early_ht.c"
diff --git a/src/mainboard/tyan/s2892/romstage.c b/src/mainboard/tyan/s2892/romstage.c
index 2ab6d32090..820e05ff96 100644
--- a/src/mainboard/tyan/s2892/romstage.c
+++ b/src/mainboard/tyan/s2892/romstage.c
@@ -11,7 +11,7 @@
 #include <spd.h>
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "southbridge/nvidia/ck804/ck804_early_smbus.h"
+#include "southbridge/nvidia/ck804/early_smbus.h"
 #include "northbridge/amd/amdk8/raminit.h"
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
@@ -38,7 +38,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "lib/generic_sdram.c"
 #include "resourcemap.c"
 #include "cpu/amd/dualcore/dualcore.c"
-#include "southbridge/nvidia/ck804/ck804_early_setup_ss.h"
+#include "southbridge/nvidia/ck804/early_setup_ss.h"
 
 //set GPIO to input mode
 #define CK804_MB_SETUP \
@@ -47,7 +47,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 	RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+16, ~(0xff),((0<<4)|(0<<2)|(0<<0)),/* K4,GPIO17, PCIXB_PRSNT1_L*/ \
 	RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+45, ~(0xff),((0<<4)|(0<<2)|(0<<0)),/* P7,GPIO46, PCIXB_PRSNT2_L*/ \
 
-#include "southbridge/nvidia/ck804/ck804_early_setup_car.c"
+#include "southbridge/nvidia/ck804/early_setup_car.c"
 #include "cpu/amd/car/post_cache_as_ram.c"
 #include "cpu/amd/model_fxx/init_cpus.c"
 #include "northbridge/amd/amdk8/early_ht.c"
diff --git a/src/mainboard/tyan/s2895/romstage.c b/src/mainboard/tyan/s2895/romstage.c
index 7a6fcbc3a7..db534f021f 100644
--- a/src/mainboard/tyan/s2895/romstage.c
+++ b/src/mainboard/tyan/s2895/romstage.c
@@ -11,7 +11,7 @@
 #include <spd.h>
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "southbridge/nvidia/ck804/ck804_early_smbus.h"
+#include "southbridge/nvidia/ck804/early_smbus.h"
 #include "northbridge/amd/amdk8/raminit.h"
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
@@ -54,7 +54,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "lib/generic_sdram.c"
 #include "resourcemap.c"
 #include "cpu/amd/dualcore/dualcore.c"
-#include "southbridge/nvidia/ck804/ck804_early_setup_ss.h"
+#include "southbridge/nvidia/ck804/early_setup_ss.h"
 
 //set GPIO to input mode
 #define CK804_MB_SETUP \
@@ -65,7 +65,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 	RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+16, ~(0xff),((0<<4)|(0<<2)|(0<<0)),/* K4,GPIO17, PCIXB_PRSNT1_L*/  \
 	RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+45, ~(0xff),((0<<4)|(0<<2)|(0<<0)),/* P7,GPIO46, PCIXB_PRSNT2_L*/
 
-#include "southbridge/nvidia/ck804/ck804_early_setup_car.c"
+#include "southbridge/nvidia/ck804/early_setup_car.c"
 #include "cpu/amd/car/post_cache_as_ram.c"
 #include "cpu/amd/model_fxx/init_cpus.c"
 #include "northbridge/amd/amdk8/early_ht.c"
diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c
index 0dd7297ea2..aa6107637d 100644
--- a/src/mainboard/tyan/s2912/romstage.c
+++ b/src/mainboard/tyan/s2912/romstage.c
@@ -37,7 +37,7 @@
 #include <spd.h>
 #include <usbdebug.h>
 #include <cpu/amd/model_fxx_rev.h>
-#include "southbridge/nvidia/mcp55/mcp55_early_smbus.c"
+#include "southbridge/nvidia/mcp55/early_smbus.c"
 #include "northbridge/amd/amdk8/raminit.h"
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
@@ -49,7 +49,7 @@
 #include "northbridge/amd/amdk8/debug.c"
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "northbridge/amd/amdk8/setup_resource_map.c"
-#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c"
+#include "southbridge/nvidia/mcp55/early_ctrl.c"
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
 
@@ -77,8 +77,8 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 	RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+59, 0x00, 0x60,/* GPIP60 FANCTL0 */ \
 	RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+60, 0x00, 0x60,/* GPIO61 FANCTL1 */
 
-#include "southbridge/nvidia/mcp55/mcp55_early_setup_ss.h"
-#include "southbridge/nvidia/mcp55/mcp55_early_setup_car.c"
+#include "southbridge/nvidia/mcp55/early_setup_ss.h"
+#include "southbridge/nvidia/mcp55/early_setup_car.c"
 #include "cpu/amd/car/post_cache_as_ram.c"
 #include "cpu/amd/model_fxx/init_cpus.c"
 #include "cpu/amd/model_fxx/fidvid.c"
diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c
index d5d2c4129b..c9c8561030 100644
--- a/src/mainboard/tyan/s2912_fam10/romstage.c
+++ b/src/mainboard/tyan/s2912_fam10/romstage.c
@@ -35,7 +35,7 @@
 #include <lib.h>
 #include <spd.h>
 #include <cpu/amd/model_10xxx_rev.h>
-#include "southbridge/nvidia/mcp55/mcp55_early_smbus.c"
+#include "southbridge/nvidia/mcp55/early_smbus.c"
 #include "northbridge/amd/amdfam10/raminit.h"
 #include "northbridge/amd/amdfam10/amdfam10.h"
 #include "cpu/amd/model_10xxx/apic_timer.c"
@@ -48,7 +48,7 @@
 #include "northbridge/amd/amdfam10/debug.c"
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "northbridge/amd/amdfam10/setup_resource_map.c"
-#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c"
+#include "southbridge/nvidia/mcp55/early_ctrl.c"
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
 
@@ -73,8 +73,8 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 	RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+59, 0x00, 0x60,/* GPIP60 FANCTL0 */ \
 	RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+60, 0x00, 0x60,/* GPIO61 FANCTL1 */
 
-#include "southbridge/nvidia/mcp55/mcp55_early_setup_ss.h"
-#include "southbridge/nvidia/mcp55/mcp55_early_setup_car.c"
+#include "southbridge/nvidia/mcp55/early_setup_ss.h"
+#include "southbridge/nvidia/mcp55/early_setup_car.c"
 #include "cpu/amd/car/post_cache_as_ram.c"
 #include "cpu/amd/microcode/microcode.c"
 #include "cpu/amd/model_10xxx/update_microcode.c"
diff --git a/src/mainboard/tyan/s4880/romstage.c b/src/mainboard/tyan/s4880/romstage.c
index cfa061313f..6e480699db 100644
--- a/src/mainboard/tyan/s4880/romstage.c
+++ b/src/mainboard/tyan/s4880/romstage.c
@@ -11,7 +11,7 @@
 #include <lib.h>
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "southbridge/amd/amd8111/amd8111_early_smbus.c"
+#include "southbridge/amd/amd8111/early_smbus.c"
 #include "northbridge/amd/amdk8/raminit.h"
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
@@ -22,7 +22,7 @@
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"
 #include "northbridge/amd/amdk8/setup_resource_map.c"
-#include "southbridge/amd/amd8111/amd8111_early_ctrl.c"
+#include "southbridge/amd/amd8111/early_ctrl.c"
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
 
diff --git a/src/mainboard/tyan/s4882/romstage.c b/src/mainboard/tyan/s4882/romstage.c
index d83c21a893..c21388f545 100644
--- a/src/mainboard/tyan/s4882/romstage.c
+++ b/src/mainboard/tyan/s4882/romstage.c
@@ -10,7 +10,7 @@
 #include <lib.h>
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "southbridge/amd/amd8111/amd8111_early_smbus.c"
+#include "southbridge/amd/amd8111/early_smbus.c"
 #include "northbridge/amd/amdk8/raminit.h"
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
@@ -21,7 +21,7 @@
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"
 #include "northbridge/amd/amdk8/setup_resource_map.c"
-#include "southbridge/amd/amd8111/amd8111_early_ctrl.c"
+#include "southbridge/amd/amd8111/early_ctrl.c"
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)