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authorPatrick Georgi <patrick.georgi@coresystems.de>2009-09-25 18:43:02 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2009-09-25 18:43:02 +0000
commit88f55b2c12f94fd0451902ee2edc663f12e401f4 (patch)
tree446179d449934a1dafeb2a2df44b8a515e380807 /src/mainboard/via/epia-cn
parent6bb3bdf869ab06a972520c5a58c6fc9b7cfe99f4 (diff)
downloadcoreboot-88f55b2c12f94fd0451902ee2edc663f12e401f4.tar.xz
some progress on kconfig:
- northbridges are done - southbridges are done - Intel CPUs are done, with a design that the board only has to specify the socket it has, and the CPUs are pulled in automatically. There is some more cleanup possible in that area, but I'll do that later - a couple more mainboards compile: - intel/eagleheights - intel/jarrell - intel/mtarvon - intel/truxton - intel/xe7501devkit - sunw/ultra40 - supermicro/h8dme - tyan/s2850 - tyan/s2875 - via/epia - via/epia-cn - via/epia-m - via/epia-m700 - via/epia-n - via/pc2500e (PPC not considered, probably overlooked something) All of them only _build_, but some options are probably completely wrong. To be fixed later Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4673 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/via/epia-cn')
-rw-r--r--src/mainboard/via/epia-cn/Kconfig45
-rw-r--r--src/mainboard/via/epia-cn/Makefile.inc63
2 files changed, 108 insertions, 0 deletions
diff --git a/src/mainboard/via/epia-cn/Kconfig b/src/mainboard/via/epia-cn/Kconfig
new file mode 100644
index 0000000000..6d57e15895
--- /dev/null
+++ b/src/mainboard/via/epia-cn/Kconfig
@@ -0,0 +1,45 @@
+config BOARD_VIA_EPIA_CN
+ bool "EPIA-CN"
+ select ARCH_X86
+ select CPU_VIA_C7
+ select NORTHBRIDGE_VIA_CN700
+ select SOUTHBRIDGE_VIA_VT8237R
+ select SUPERIO_VIA_VT1211
+ select HAVE_PIRQ_TABLE
+ help
+ VIA EPIA-CN mainboard.
+
+config MAINBOARD_DIR
+ string
+ default via/epia-cn
+ depends on BOARD_VIA_EPIA_CN
+
+#config DCACHE_RAM_BASE
+# hex
+# default 0xffef0000
+# depends on BOARD_VIA_EPIA_CN
+#
+#config DCACHE_RAM_SIZE
+# hex
+# default 0x8000
+# depends on BOARD_VIA_EPIA_CN
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "EPIA_CN"
+ depends on BOARD_VIA_EPIA_CN
+
+config VIDEO_MB
+ int
+ default 32
+ depends on BOARD_VIA_EPIA_CN
+
+config RAMBASE
+ hex
+ default 0x4000
+ depends on BOARD_VIA_EPIA_CN
+
+config IRQ_SLOT_COUNT
+ int
+ default 9
+ depends on BOARD_VIA_EPIA_CN
diff --git a/src/mainboard/via/epia-cn/Makefile.inc b/src/mainboard/via/epia-cn/Makefile.inc
new file mode 100644
index 0000000000..a6c8073117
--- /dev/null
+++ b/src/mainboard/via/epia-cn/Makefile.inc
@@ -0,0 +1,63 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2008 VIA Technologies, Inc.
+## (Written by Aaron Lwe <aaron.lwe@gmail.com> for VIA)
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+initobj-y += crt0.o
+obj-y += mainboard.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+
+obj-$(CONFIG_HAVE_ACPI_TABLES) += fadt.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += dsdt.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += acpi_tables.o
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/cpu/x86/fpu/enable_fpu.inc
+crt0-y += ../../../../src/cpu/x86/mmx/enable_mmx.inc
+crt0-y += auto.inc
+crt0-y += ../../../../src/cpu/x86/mmx/disable_mmx.inc
+
+ifdef POST_EVALUATION
+
+MAINBOARD_OPTIONS=
+
+$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
+
+$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
+ iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
+ mv dsdt.hex $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+ perl -e 's/\.rodata/.rom.data/g' -pi $@
+ perl -e 's/\.text/.section .rom.text/g' -pi $@
+
+endif
+