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authorNico Huber <nico.h@gmx.de>2016-08-11 22:45:55 +0200
committerMartin Roth <martinroth@google.com>2016-08-17 00:27:42 +0200
commitd23ee5de2233d2f200dc15bf4a7669599c2b2014 (patch)
tree1446c7a57813f9ba0782c6199bafbf8392d97ff3 /src/mainboard/via/epia-cn
parent4f79e6618519fa1aa8e8afaac57fc7dbfeeb4484 (diff)
downloadcoreboot-d23ee5de2233d2f200dc15bf4a7669599c2b2014.tar.xz
mainboard: Clean up boot_option/reboot_bits in cmos.layout
Since commit 3bfd7cc (drivers/pc80: Rework normal / fallback selector code) the reboot counter stored in `reboot_bits` isn't reset on a reboot with `boot_option = 1` any more. Hence, with SKIP_MAX_REBOOT_CNT_CLEAR enabled, later stages (e.g. payload, OS) have to clear the counter too, when they want to switch to normal boot. So change the bits to (h)ex instead of (r)eserved. To clarify their meaning, rename `reboot_bits` to `reboot_counter`. Also remove all occurences of the obsolete `last_boot` bit that have sneaked in again since 24391321 (mainboard: Remove last_boot NVRAM option). Change-Id: Ib3fc38115ce951b75374e0d1347798b23db7243c Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/16157 Tested-by: build bot (Jenkins) Reviewed-by: Timothy Pearson <tpearson@raptorengineering.com> Reviewed-by: York Yang <york.yang@intel.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/via/epia-cn')
-rw-r--r--src/mainboard/via/epia-cn/cmos.layout2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/via/epia-cn/cmos.layout b/src/mainboard/via/epia-cn/cmos.layout
index 6de5ab6d1b..d9ec5520bf 100644
--- a/src/mainboard/via/epia-cn/cmos.layout
+++ b/src/mainboard/via/epia-cn/cmos.layout
@@ -2,7 +2,7 @@ entries
0 384 r 0 reserved_memory
384 1 e 4 boot_option
-388 4 r 0 reboot_bits
+388 4 h 0 reboot_counter
392 3 e 5 baud_rate
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level