This patch unifies the use of config options in v2 to all start with CONFIG_

It's basically done with the following script and some manual fixup:

VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC`
for VAR in $VARS; do
	find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \;
done

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

5 files changed, 84 insertions, 84 deletions

diff --git a/src/mainboard/via/epia-m700/Config.lb b/src/mainboard/via/epia-m700/Config.lb
index 70f669ef62..33006e4963 100644
--- a/src/mainboard/via/epia-m700/Config.lb
+++ b/src/mainboard/via/epia-m700/Config.lb
@@ -18,16 +18,16 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ##
 
-## XIP_ROM_SIZE must be a power of 2.
-default XIP_ROM_SIZE = 64 * 1024
+## CONFIG_XIP_ROM_SIZE must be a power of 2.
+default CONFIG_XIP_ROM_SIZE = 64 * 1024
 include /config/nofailovercalculation.lb
 
 arch i386 end
 driver mainboard.o
 driver wakeup.o
-if HAVE_PIRQ_TABLE object irq_tables.o end
-if HAVE_MP_TABLE object mptable.o end
-if HAVE_ACPI_TABLES
+if CONFIG_HAVE_PIRQ_TABLE object irq_tables.o end
+if CONFIG_HAVE_MP_TABLE object mptable.o end
+if CONFIG_HAVE_ACPI_TABLES
   object fadt.o
   object dsdt.o
   # object ssdt.o
@@ -35,23 +35,23 @@ if HAVE_ACPI_TABLES
 end
 # These lines maybe noused.
 makerule ./failover.E
-  depends "$(MAINBOARD)/../../../arch/i386/lib/failover.c ./romcc"
-  action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
+  depends "$(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c ./romcc"
+  action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
 end
 makerule ./failover.inc
-  depends "$(MAINBOARD)/../../../arch/i386/lib/failover.c ./romcc"
-  action "./romcc    -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
+  depends "$(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c ./romcc"
+  action "./romcc    -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
 end
-if USE_DCACHE_RAM
+if CONFIG_USE_DCACHE_RAM
   if CONFIG_USE_INIT
     makerule ./cache_as_ram_auto.o
-      depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
-      action "$(CC) $(DISTRO_CFLAGS) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -o $@"
+      depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c option_table.h"
+      action "$(CC) $(DISTRO_CFLAGS) -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -o $@"
     end
   else
     makerule ./cache_as_ram_auto.inc
-      depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
-      action "$(CC) $(DISTRO_CFLAGS) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -S -o $@"
+      depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c option_table.h"
+      action "$(CC) $(DISTRO_CFLAGS) -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -S -o $@"
       action "perl -e 's/.rodata/.rom.data/g' -pi $@"
       action "perl -e 's/.text/.section .rom.text/g' -pi $@"
     end
@@ -65,7 +65,7 @@ ldscript /northbridge/via/vx800/romstrap.lds
 
 mainboardinit cpu/x86/32bit/entry32.inc
 ldscript /cpu/x86/32bit/entry32.lds
-if USE_FALLBACK_IMAGE
+if CONFIG_USE_FALLBACK_IMAGE
   mainboardinit cpu/x86/16bit/reset16.inc
   ldscript /cpu/x86/16bit/reset16.lds
 else
@@ -81,11 +81,11 @@ end
 mainboardinit arch/i386/lib/id.inc
 ldscript /arch/i386/lib/id.lds
 
-if USE_DCACHE_RAM
+if CONFIG_USE_DCACHE_RAM
   mainboardinit cpu/via/car/cache_as_ram.inc
 end
 
-if USE_FALLBACK_IMAGE
+if CONFIG_USE_FALLBACK_IMAGE
   ldscript /arch/i386/lib/failover.lds
   # failover.inc need definition in cpu_reset.inc, but we do not include
   # cpu_reset.inc,so ...
@@ -94,7 +94,7 @@ end
 # mainboardinit cpu/x86/fpu/enable_fpu.inc
 # mainboardinit cpu/x86/mmx/enable_mmx.inc
 
-if USE_DCACHE_RAM
+if CONFIG_USE_DCACHE_RAM
   if CONFIG_USE_INIT
     initobject cache_as_ram_auto.o
   else
diff --git a/src/mainboard/via/epia-m700/Options.lb b/src/mainboard/via/epia-m700/Options.lb
index 5fe9240778..c0fc338df5 100644
--- a/src/mainboard/via/epia-m700/Options.lb
+++ b/src/mainboard/via/epia-m700/Options.lb
@@ -18,59 +18,59 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ##
 
-uses HAVE_MP_TABLE
+uses CONFIG_HAVE_MP_TABLE
 uses CONFIG_CBFS
-uses HAVE_PIRQ_TABLE
-uses USE_FALLBACK_IMAGE
-uses HAVE_FALLBACK_BOOT
-uses HAVE_HARD_RESET
-uses HAVE_OPTION_TABLE
-uses USE_OPTION_TABLE
+uses CONFIG_HAVE_PIRQ_TABLE
+uses CONFIG_USE_FALLBACK_IMAGE
+uses CONFIG_HAVE_FALLBACK_BOOT
+uses CONFIG_HAVE_HARD_RESET
+uses CONFIG_HAVE_OPTION_TABLE
+uses CONFIG_USE_OPTION_TABLE
 uses CONFIG_ROM_PAYLOAD
-uses IRQ_SLOT_COUNT
-uses MAINBOARD
-uses MAINBOARD_VENDOR
-uses MAINBOARD_PART_NUMBER
+uses CONFIG_IRQ_SLOT_COUNT
+uses CONFIG_MAINBOARD
+uses CONFIG_MAINBOARD_VENDOR
+uses CONFIG_MAINBOARD_PART_NUMBER
 uses COREBOOT_EXTRA_VERSION
-uses ARCH
-uses FALLBACK_SIZE
-uses STACK_SIZE
-uses HEAP_SIZE
-uses ROM_SIZE
-uses ROM_SECTION_SIZE
-uses ROM_IMAGE_SIZE
-uses ROM_SECTION_SIZE
-uses ROM_SECTION_OFFSET
+uses CONFIG_ARCH
+uses CONFIG_FALLBACK_SIZE
+uses CONFIG_STACK_SIZE
+uses CONFIG_HEAP_SIZE
+uses CONFIG_ROM_SIZE
+uses CONFIG_ROM_SECTION_SIZE
+uses CONFIG_ROM_IMAGE_SIZE
+uses CONFIG_ROM_SECTION_SIZE
+uses CONFIG_ROM_SECTION_OFFSET
 uses CONFIG_ROM_PAYLOAD_START
 uses CONFIG_COMPRESSED_PAYLOAD_NRV2B
 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
-uses PAYLOAD_SIZE
-uses _ROMBASE
-uses _RAMBASE
-uses XIP_ROM_SIZE
-uses XIP_ROM_BASE
-uses HAVE_MP_TABLE
-uses HAVE_ACPI_TABLES
-uses CROSS_COMPILE
+uses CONFIG_PAYLOAD_SIZE
+uses CONFIG_ROMBASE
+uses CONFIG_RAMBASE
+uses CONFIG_XIP_ROM_SIZE
+uses CONFIG_XIP_ROM_BASE
+uses CONFIG_HAVE_MP_TABLE
+uses CONFIG_HAVE_ACPI_TABLES
+uses CONFIG_CROSS_COMPILE
 uses CC
-uses HOSTCC
-uses OBJCOPY
-uses DEFAULT_CONSOLE_LOGLEVEL
-uses MAXIMUM_CONSOLE_LOGLEVEL
+uses CONFIG_HOSTCC
+uses CONFIG_OBJCOPY
+uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL
+uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL
 uses CONFIG_CONSOLE_SERIAL8250
 uses CONFIG_UDELAY_TSC
 uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
 uses CONFIG_PCI_ROM_RUN
 uses CONFIG_CONSOLE_VGA
 uses CONFIG_MAX_PCI_BUSES
-uses TTYS0_BAUD
+uses CONFIG_TTYS0_BAUD
 uses CONFIG_VIDEO_MB
 uses CONFIG_IOAPIC
 
 ## New options
-uses USE_DCACHE_RAM
-uses DCACHE_RAM_BASE
-uses DCACHE_RAM_SIZE
+uses CONFIG_USE_DCACHE_RAM
+uses CONFIG_DCACHE_RAM_BASE
+uses CONFIG_DCACHE_RAM_SIZE
 uses CONFIG_USE_INIT
 #uses MAX_RAM_SLOTS
 #uses USB_ENABLE
@@ -85,11 +85,11 @@ uses CONFIG_USE_INIT
 #uses VIACONFIG_VGA_PCI_14
 
 ## New options
-default USE_DCACHE_RAM = 1
-default DCACHE_RAM_BASE = 0xffef0000
-# default DCACHE_RAM_BASE = 0xffbf0000
-# default DCACHE_RAM_BASE = 0xfec00000 # HPET may use this.
-default DCACHE_RAM_SIZE = 8 * 1024
+default CONFIG_USE_DCACHE_RAM = 1
+default CONFIG_DCACHE_RAM_BASE = 0xffef0000
+# default CONFIG_DCACHE_RAM_BASE = 0xffbf0000
+# default CONFIG_DCACHE_RAM_BASE = 0xfec00000 # HPET may use this.
+default CONFIG_DCACHE_RAM_SIZE = 8 * 1024
 default CONFIG_USE_INIT = 0
 #default MAX_RAM_SLOTS = 2
 #default USB_ENABLE = 1
@@ -104,7 +104,7 @@ default CONFIG_USE_INIT = 0
 #default VIACONFIG_VGA_PCI_10 = 0xf8000008
 #default VIACONFIG_VGA_PCI_14 = 0xfc000000
 
-default ROM_SIZE = 512 * 1024
+default CONFIG_ROM_SIZE = 512 * 1024
 default CONFIG_IOAPIC = 1
 
 # Define framebuffer size of VX800's integrated graphics card.
@@ -114,27 +114,27 @@ default CONFIG_VIDEO_MB = 64
 default CONFIG_CONSOLE_SERIAL8250 = 1
 default CONFIG_PCI_ROM_RUN = 0
 default CONFIG_CONSOLE_VGA = 0
-default HAVE_FALLBACK_BOOT = 1
-default HAVE_MP_TABLE = 0
+default CONFIG_HAVE_FALLBACK_BOOT = 1
+default CONFIG_HAVE_MP_TABLE = 0
 default CONFIG_UDELAY_TSC = 1
 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
-default HAVE_HARD_RESET = 0
-default HAVE_PIRQ_TABLE = 0
-default IRQ_SLOT_COUNT = 14
-default HAVE_ACPI_TABLES = 1
-default HAVE_OPTION_TABLE = 1
-default ROM_IMAGE_SIZE = 128 * 1024
-default FALLBACK_SIZE = ROM_SIZE
-default USE_FALLBACK_IMAGE = 1
-default STACK_SIZE = 16 * 1024
-default HEAP_SIZE = 20 * 1024
-# default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
-default USE_OPTION_TABLE = 0
-default _RAMBASE = 0x00004000
+default CONFIG_HAVE_HARD_RESET = 0
+default CONFIG_HAVE_PIRQ_TABLE = 0
+default CONFIG_IRQ_SLOT_COUNT = 14
+default CONFIG_HAVE_ACPI_TABLES = 1
+default CONFIG_HAVE_OPTION_TABLE = 1
+default CONFIG_ROM_IMAGE_SIZE = 128 * 1024
+default CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE
+default CONFIG_USE_FALLBACK_IMAGE = 1
+default CONFIG_STACK_SIZE = 16 * 1024
+default CONFIG_HEAP_SIZE = 20 * 1024
+# default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE
+default CONFIG_USE_OPTION_TABLE = 0
+default CONFIG_RAMBASE = 0x00004000
 default CONFIG_ROM_PAYLOAD = 1
-default CROSS_COMPILE = ""
-default CC = "$(CROSS_COMPILE)gcc -m32"
-default HOSTCC = "gcc"
+default CONFIG_CROSS_COMPILE = ""
+default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32"
+default CONFIG_HOSTCC = "gcc"
 default CONFIG_CBFS = 0
 
 ##
diff --git a/src/mainboard/via/epia-m700/acpi_tables.c b/src/mainboard/via/epia-m700/acpi_tables.c
index 54480cdff5..709af4b65e 100644
--- a/src/mainboard/via/epia-m700/acpi_tables.c
+++ b/src/mainboard/via/epia-m700/acpi_tables.c
@@ -43,9 +43,9 @@ extern u8 acpi_sleep_type;
 
 /*
  * These four macros are copied from <arch/smp/mpspec.h>, I have to do this
- * since the "default HAVE_MP_TABLE = 0" in Options.lb, and also since
+ * since the "default CONFIG_HAVE_MP_TABLE = 0" in Options.lb, and also since
  * mainboard/via/... have no mptable.c (so that I can not set
- * HAVE_MP_TABLE = 1) as many other mainboards.
+ * CONFIG_HAVE_MP_TABLE = 1) as many other mainboards.
  * So I have to copy these four to here. acpi_fill_madt() needs this.
  */
 #define MP_IRQ_POLARITY_HIGH	0x1
diff --git a/src/mainboard/via/epia-m700/cache_as_ram_auto.c b/src/mainboard/via/epia-m700/cache_as_ram_auto.c
index 82683a5bdc..de5acb90bd 100644
--- a/src/mainboard/via/epia-m700/cache_as_ram_auto.c
+++ b/src/mainboard/via/epia-m700/cache_as_ram_auto.c
@@ -708,7 +708,7 @@ void amd64_main(unsigned long bist)
  * around CLEAR_FIRST_1M_RAM and #include "cpu/x86/car/cache_as_ram_post.c".
  * The CLEAR_FIRST_1M_RAM seems to make cpu/x86/car/cache_as_ram_post.c stop
  * at somewhere, and cpu/x86/car/cache_as_ram_post.c do not cache my
- * $XIP_ROM_BASE+SIZE area.
+ * $CONFIG_XIP_ROM_BASE+SIZE area.
  *
  * Use #include "cpu/via/car/cache_as_ram_post.c". This version post.c have
  * some diff with x86-version.
@@ -772,10 +772,10 @@ cpu_reset_x:
 #include "cpu/via/car/cache_as_ram_post.c"
 /* #include "cpu/x86/car/cache_as_ram_post.c" */
 	__asm__ volatile (
-		/* Set new esp *//* before _RAMBASE */
+		/* Set new esp *//* before CONFIG_RAMBASE */
 		"subl %0, %%ebp\n\t"
 		"subl %0, %%esp\n\t"::
-		"a" ((DCACHE_RAM_BASE + DCACHE_RAM_SIZE) - _RAMBASE)
+		"a" ((CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE) - CONFIG_RAMBASE)
 	);
 
 	{
diff --git a/src/mainboard/via/epia-m700/irq_tables.c b/src/mainboard/via/epia-m700/irq_tables.c
index cb841bf1e4..817b4d6130 100644
--- a/src/mainboard/via/epia-m700/irq_tables.c
+++ b/src/mainboard/via/epia-m700/irq_tables.c
@@ -23,7 +23,7 @@
 const struct irq_routing_table intel_irq_routing_table = {
 	PIRQ_SIGNATURE,		/* u32 signature */
 	PIRQ_VERSION,		/* u16 version   */
-	32 + 16 * IRQ_SLOT_COUNT,/* Max. number of devices on the bus */
+	32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */
 	0x00,			/* Where the interrupt router lies (bus) */
 	(0x11 << 3) | 0x0,	/* Where the interrupt router lies (dev) */
 	0xc20,			/* IRQs devoted exclusively to PCI usage */