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author | Kevin Paul Herbert <kph@meraki.net> | 2014-12-24 18:43:20 -0800 |
---|---|---|
committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2015-02-15 08:50:22 +0100 |
commit | bde6d309dfafe58732ec46314a2d4c08974b62d4 (patch) | |
tree | 17ba00565487ddfbb5759c96adfbb3fffe2a4550 /src/mainboard/via/epia-m850 | |
parent | 4b10dec1a66122b515b2191f823d7fd379ec655f (diff) | |
download | coreboot-bde6d309dfafe58732ec46314a2d4c08974b62d4.tar.xz |
x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer
On x86, change the type of the address parameter in
read8()/read16/read32()/write8()/write16()/write32() to be a
pointer, instead of unsigned long.
Change-Id: Ic26dd8a72d82828b69be3c04944710681b7bd330
Signed-off-by: Kevin Paul Herbert <kph@meraki.net>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/7784
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/via/epia-m850')
-rw-r--r-- | src/mainboard/via/epia-m850/devicetree.cb | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/via/epia-m850/devicetree.cb b/src/mainboard/via/epia-m850/devicetree.cb index 0c21cc8f58..aa2db2a779 100644 --- a/src/mainboard/via/epia-m850/devicetree.cb +++ b/src/mainboard/via/epia-m850/devicetree.cb @@ -38,7 +38,7 @@ chip northbridge/via/vx900 # Northbridge register "have_isa_interrupts" = "0" register "irq_on_fsb" = "1" register "enable_virtual_wire" = "1" - register "base" = "0xfecc0000" + register "base" = "(void *)0xfecc0000" device ioapic 2 on end end end @@ -71,7 +71,7 @@ chip northbridge/via/vx900 # Northbridge register "have_isa_interrupts" = "1" register "irq_on_fsb" = "1" register "enable_virtual_wire" = "1" - register "base" = "0xfec00000" + register "base" = "(void *)0xfec00000" device ioapic 1 on end end #chip drivers/generic/generic # DIMM 0 channel 1 |