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authorJon Harrison <bothlyn@blueyonder.co.uk>2009-08-17 17:09:46 +0000
committerMyles Watson <mylesgw@gmail.com>2009-08-17 17:09:46 +0000
commit1825be291f49f892fa8c048974239aa0daa4de56 (patch)
tree0451175aed9b7d9f8d5a1cffc0a69ade799c36aa /src/mainboard/via/epia-n/auto.c
parentb5f4e77bff5247dc155873f668a0ccf35400cd11 (diff)
downloadcoreboot-1825be291f49f892fa8c048974239aa0daa4de56.tar.xz
Get the Via EPIA-N(L)/CN400 to a reasonable level of maturity::
Tested on Via EPIA-NL8000EG with FILO payload booting FC9 (2.6.25 kernel) from SATA HDD. ACPI is working for PCI interrupt routing, some memory stuff and Soft-Off. USB/SATA Working VGA Console Working X Working via Onboard AGP Removed dsdt.c, fixed some whitespace. Signed-off-by: Jon Harrison <bothlyn@blueyonder.co.uk> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4549 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/via/epia-n/auto.c')
-rw-r--r--src/mainboard/via/epia-n/auto.c11
1 files changed, 2 insertions, 9 deletions
diff --git a/src/mainboard/via/epia-n/auto.c b/src/mainboard/via/epia-n/auto.c
index 031400e160..d914ee2dbc 100644
--- a/src/mainboard/via/epia-n/auto.c
+++ b/src/mainboard/via/epia-n/auto.c
@@ -73,13 +73,6 @@ static void enable_mainboard_devices(void)
device_t dev;
u8 reg;
- dev = pci_locate_device(PCI_ID(0x1106, 0x7259), 0);
- if (dev == PCI_DEV_INVALID)
- die("Northbridge V-Link not found!!!\n");
- pci_write_config8(dev, 0x4F, 0x01);
- pci_write_config8(dev, 0x48, 0x13);
-
-
dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT8237R_LPC), 0);
if (dev == PCI_DEV_INVALID)
die("Southbridge not found!!!\n");
@@ -93,7 +86,7 @@ static void enable_mainboard_devices(void)
* 2 16.2 USB 3
* 1 16.4 USB EHCI
*/
- pci_write_config8(dev, 0x50, 0x80);
+ pci_write_config8(dev, 0x50, 0xC0);
/*bit=0 means enable internal function (per VT8237R datasheet)
* 7 USB Device Mode
@@ -106,7 +99,7 @@ static void enable_mainboard_devices(void)
* 1 Internal KBC Configuration
* 0 Internal Keyboard Controller
*/
- pci_write_config8(dev, 0x51, 0x1d);
+ pci_write_config8(dev, 0x51, 0x9d);
}
static void enable_shadow_ram(void)