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author | Stefan Reinauer <reinauer@chromium.org> | 2014-12-17 13:59:20 -0800 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2014-12-18 02:14:45 +0100 |
commit | 295d9e6569413556afeec7835d6e82aab5878516 (patch) | |
tree | 2eb2f542087a33b5138b4649dcbfa44ff387f343 /src/mainboard/via/epia-n/mptable.c | |
parent | 42874ace62a0fe7b3c54c729e3c57c330449b86b (diff) | |
download | coreboot-295d9e6569413556afeec7835d6e82aab5878516.tar.xz |
Drop VIA Epia-N
ROMCC cleanup.
Change-Id: Id72e6fcb89165f28cad8bf3a5b632d3fa094b7dd
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/7855
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/mainboard/via/epia-n/mptable.c')
-rw-r--r-- | src/mainboard/via/epia-n/mptable.c | 50 |
1 files changed, 0 insertions, 50 deletions
diff --git a/src/mainboard/via/epia-n/mptable.c b/src/mainboard/via/epia-n/mptable.c deleted file mode 100644 index de25d0e549..0000000000 --- a/src/mainboard/via/epia-n/mptable.c +++ /dev/null @@ -1,50 +0,0 @@ -/* generated by MPTable, version 2.0.15*/ -/* as modified by RGM for coreboot */ -#include <console/console.h> -#include <arch/smp/mpspec.h> -#include <arch/ioapic.h> -#include <device/pci.h> -#include <string.h> -#include <stdint.h> - -static void *smp_write_config_table(void *v) -{ - struct mp_config_table *mc; - int isa_bus; - - mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - - mptable_init(mc, LOCAL_APIC_ADDR); - - smp_write_processors(mc); - mptable_write_buses(mc, NULL, &isa_bus); - -/*I/O APICs: APIC ID Version State Address*/ - smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR); - - mptable_add_isa_interrupts(mc, isa_bus, 0x2, 0); - -/*I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x40, 0x2, 0x15); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x40, 0x2, 0x15); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x41, 0x2, 0x15); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x41, 0x2, 0x15); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x42, 0x2, 0x15); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x46, 0x2, 0x16); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x1, 0x0, 0x2, 0x10); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x48, 0x2, 0x17); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x3d, 0x2, 0x14); -/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/ - mptable_lintsrc(mc, 0x0); - /* There is no extension information... */ - - /* Compute the checksums */ - return mptable_finalize(mc); -} - -unsigned long write_smp_table(unsigned long addr) -{ - void *v; - v = smp_write_floating_table(addr, 0); - return (unsigned long)smp_write_config_table(v); -} |