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authorRonald G. Minnich <rminnich@gmail.com>2003-09-26 16:12:23 +0000
committerRonald G. Minnich <rminnich@gmail.com>2003-09-26 16:12:23 +0000
commit430111b9d1472ef72d9960020eb3eb28e276ca7e (patch)
tree2c2f73a131983260260fb6abb4172378cfa3afbb /src/mainboard/via/epia/Config.lb
parentaa4b4e031f9f48840aca3c4961d3edf59701eea7 (diff)
downloadcoreboot-430111b9d1472ef72d9960020eb3eb28e276ca7e.tar.xz
It builds!
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1150 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/via/epia/Config.lb')
-rw-r--r--src/mainboard/via/epia/Config.lb27
1 files changed, 8 insertions, 19 deletions
diff --git a/src/mainboard/via/epia/Config.lb b/src/mainboard/via/epia/Config.lb
index 6d30820105..c4527cec17 100644
--- a/src/mainboard/via/epia/Config.lb
+++ b/src/mainboard/via/epia/Config.lb
@@ -14,6 +14,7 @@ uses PAYLOAD_SIZE
uses _ROMBASE
uses XIP_ROM_SIZE
uses XIP_ROM_BASE
+uses HAVE_MP_TABLE
## ROM_SIZE is the size of boot ROM that this board will use.
default ROM_SIZE 524288
@@ -28,6 +29,11 @@ default ROM_SIZE 524288
option HAVE_FALLBACK_BOOT=1
##
+## no MP table
+##
+option HAVE_MP_TABLE=0
+
+##
## Build code to reset the motherboard from linuxBIOS
##
option HAVE_HARD_RESET=1
@@ -37,12 +43,7 @@ option HAVE_HARD_RESET=1
##
option HAVE_PIRQ_TABLE=1
option IRQ_SLOT_COUNT=7
-
-##
-## Build code to export an x86 MP table
-## Useful for specifying IRQ routing values
-##
-option HAVE_MP_TABLE=1
+object irq_tables.o
##
## Build code to export a CMOS option table
@@ -50,18 +51,6 @@ option HAVE_MP_TABLE=1
option HAVE_OPTION_TABLE=1
##
-## Build code for SMP support
-## Only worry about 2 micro processors
-##
-option CONFIG_SMP=1
-option CONFIG_MAX_CPUS=2
-
-##
-## Build code to setup a generic IOAPIC
-##
-option CONFIG_IOAPIC=1
-
-##
## Clean up the motherboard id strings
##
option MAINBOARD_PART_NUMBER="HDAMA"
@@ -238,7 +227,7 @@ northbridge via/vt8601 "vt8601"
end
end
-cpu p5 "cpu0"
+cpu p6 "cpu0"
end