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| author | Ronald G. Minnich <rminnich@gmail.com> | 2003-09-30 02:16:47 +0000 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2003-09-30 02:16:47 +0000 |
| commit | 99dcf231f48433a07cbd47ecb0c23301a6b5b34e (patch) | |
| tree | 0ea4045b3c64e80081c15a706c9308a5b94c4ba6 /src/mainboard/via/epia/Config.lb | |
| parent | 02360d6672bd95b980f83f464dea4c624b8f8aa2 (diff) | |
| download | coreboot-99dcf231f48433a07cbd47ecb0c23301a6b5b34e.tar.xz | |
The epia now works.
Now to fix the ram ...
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1159 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/via/epia/Config.lb')
| -rw-r--r-- | src/mainboard/via/epia/Config.lb | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/src/mainboard/via/epia/Config.lb b/src/mainboard/via/epia/Config.lb index c4527cec17..c32c4decb0 100644 --- a/src/mainboard/via/epia/Config.lb +++ b/src/mainboard/via/epia/Config.lb @@ -208,22 +208,22 @@ dir /pc80 config chip.h northbridge via/vt8601 "vt8601" - pci 0:18.0 - pci 0:18.0 - pci 0:18.0 - pci 0:18.1 - pci 0:18.2 - pci 0:18.3 +# pci 0:0.0 +# pci 0:1.0 southbridge via/vt8231 "vt8231" +# pci 0:11.0 +# pci 0:11.1 +# pci 0:11.2 +# pci 0:11.3 +# pci 0:11.4 +# pci 0:11.5 +# pci 0:11.6 +# pci 0:12.0 register "enable_usb" = "0" register "enable_native_ide" = "1" register "enable_com_ports" = "1" register "enable_keyboard" = "0" register "enable_nvram" = "1" - pci 0:0.0 - pci 0:0.1 - pci 0:1.0 - pci 0:1.1 end end |