diff options
author | Eric Biederman <ebiederm@xmission.com> | 2004-11-04 11:04:33 +0000 |
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committer | Eric Biederman <ebiederm@xmission.com> | 2004-11-04 11:04:33 +0000 |
commit | 018d8dd60f2cc0c82faac0ee2657daa163dd43e7 (patch) | |
tree | 528de120d262a9df05ce8b6119f593c85fa6b809 /src/mainboard/via/epia/auto.c | |
parent | 4403f6082372d069e3cabe0918d9af5f9c1dccf6 (diff) | |
download | coreboot-018d8dd60f2cc0c82faac0ee2657daa163dd43e7.tar.xz |
- Update abuild.sh so it will rebuild successfull builds
- Move pci_set_method out of hardwaremain.c
- Re-add debugging name field but only include the CONFIG_CHIP_NAME is
enabled. All instances are now wrapped in CHIP_NAME
- Many minor cleanups so most ports build.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/via/epia/auto.c')
-rw-r--r-- | src/mainboard/via/epia/auto.c | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/src/mainboard/via/epia/auto.c b/src/mainboard/via/epia/auto.c index 377dc54754..6c8ea903ee 100644 --- a/src/mainboard/via/epia/auto.c +++ b/src/mainboard/via/epia/auto.c @@ -2,7 +2,9 @@ #include <stdint.h> #include <device/pci_def.h> +#if 0 #include <cpu/x86/lapic.h> +#endif #include <arch/io.h> #include <device/pnp_def.h> #include <arch/romcc_io.h> @@ -12,6 +14,7 @@ #include "ram/ramtest.c" #include "northbridge/via/vt8601/raminit.h" #include "cpu/x86/mtrr/earlymtrr.c" +#include "cpu/x86/bist.h" /* */ @@ -93,14 +96,19 @@ static void enable_shadow_ram(void) pci_write_config8(dev, 0x63, shadowreg); } -static void main(void) +static void main(unsigned long bist) { unsigned long x; + if (bist == 0) { + early_mtrr_init(); + } enable_vt8231_serial(); - uart_init(); console_init(); + + /* Halt if there was a built in self test failure */ + report_bist_failure(bist); enable_mainboard_devices(); enable_smbus(); @@ -134,5 +142,4 @@ static void main(void) ram_check(check_addrs[i].lo, check_addrs[i].hi); } #endif - early_mtrr_init(); } |