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| author | arch import user (historical) <svn@openbios.org> | 2005-07-06 17:15:54 +0000 |
|---|---|---|
| committer | arch import user (historical) <svn@openbios.org> | 2005-07-06 17:15:54 +0000 |
| commit | 1c8cd59f3c9248f0954a5cf215dc3652ccfc8da5 (patch) | |
| tree | 7c19d8a922e2d0613a494c5949b2b6f45c388e13 /src/mainboard/via/epia/auto.c | |
| parent | 7e5fbd6fc03df87c9276b08219ca15ad17c43dac (diff) | |
| download | coreboot-1c8cd59f3c9248f0954a5cf215dc3652ccfc8da5.tar.xz | |
Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-38
Creator: Li-Ta Lo <ollie@lanl.gov>
emulator update
x96emu update from Paulo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1954 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/via/epia/auto.c')
| -rw-r--r-- | src/mainboard/via/epia/auto.c | 24 |
1 files changed, 19 insertions, 5 deletions
diff --git a/src/mainboard/via/epia/auto.c b/src/mainboard/via/epia/auto.c index 9e12f52a7c..6c8ea903ee 100644 --- a/src/mainboard/via/epia/auto.c +++ b/src/mainboard/via/epia/auto.c @@ -2,6 +2,9 @@ #include <stdint.h> #include <device/pci_def.h> +#if 0 +#include <cpu/x86/lapic.h> +#endif #include <arch/io.h> #include <device/pnp_def.h> #include <arch/romcc_io.h> @@ -18,7 +21,7 @@ void udelay(int usecs) { int i; - for (i = 0; i < usecs; i++) + for(i = 0; i < usecs; i++) outb(i&0xff, 0x80); } @@ -27,8 +30,18 @@ void udelay(int usecs) #include "debug.c" #include "southbridge/via/vt8231/vt8231_early_smbus.c" + + #include "southbridge/via/vt8231/vt8231_early_serial.c" +static void memreset_setup(void) +{ +} +/* + static void memreset(int controllers, const struct mem_controller *ctrl) + { + } +*/ static inline int spd_read_byte(unsigned device, unsigned address) { unsigned char c; @@ -36,6 +49,8 @@ static inline int spd_read_byte(unsigned device, unsigned address) return c; } + + #include "northbridge/via/vt8601/raminit.c" /* #include "sdram/generic_sdram.c" @@ -51,7 +66,6 @@ static void enable_mainboard_devices(void) if (dev == PCI_DEV_INVALID) { die("Southbridge not found!!!\n"); } - pci_write_config8(dev, 0x50, 7); pci_write_config8(dev, 0x51, 0xff); #if 0 @@ -73,9 +87,9 @@ static void enable_mainboard_devices(void) static void enable_shadow_ram(void) { - device_t dev = 0; + device_t dev = 0; /* no need to look up 0:0.0 */ unsigned char shadowreg; - + /* dev 0 for southbridge */ shadowreg = pci_read_config8(dev, 0x63); /* 0xf0000-0xfffff */ shadowreg |= 0x30; @@ -99,8 +113,8 @@ static void main(unsigned long bist) enable_mainboard_devices(); enable_smbus(); enable_shadow_ram(); - /* + memreset_setup(); this is way more generic than we need. sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); */ |