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author | Uwe Hermann <uwe@hermann-uwe.de> | 2009-10-16 16:39:40 +0000 |
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committer | Uwe Hermann <uwe@hermann-uwe.de> | 2009-10-16 16:39:40 +0000 |
commit | 04b9b92952d0e9f4b520fa9f1512daf5608f080b (patch) | |
tree | 06c72dbc0740db19332640a15490a304b2021e83 /src/mainboard/via/vt8454c | |
parent | 0f61a4fc98f135c0ed22c67ee3241bf5670a61e2 (diff) | |
download | coreboot-04b9b92952d0e9f4b520fa9f1512daf5608f080b.tar.xz |
Drop unused and useless CONFIG_MAX_PCI_BUSES.
It was added by rsmith in r2273 on 20060424, when pci_locate_device() in
src/arch/i386/include/arch/romcc_io.h in fact scanned all busses:
- for(; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0,0,1)) {
+ for(; dev <= PCI_DEV(CONFIG_MAX_PCI_BUSES, 31, 7); dev += PCI_DEV(0,0,1)) {
Today this looks like:
for(; dev <= PCI_DEV(255|(((1<<CONFIG_PCI_BUS_SEGN_BITS)-1)<<8), 31, 7); dev += PCI_DEV(0,0,1)) {
and CONFIG_MAX_PCI_BUSES is never used anywhere.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4789 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/via/vt8454c')
-rw-r--r-- | src/mainboard/via/vt8454c/Options.lb | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/src/mainboard/via/vt8454c/Options.lb b/src/mainboard/via/vt8454c/Options.lb index 0d84d5f357..cb796caf97 100644 --- a/src/mainboard/via/vt8454c/Options.lb +++ b/src/mainboard/via/vt8454c/Options.lb @@ -72,7 +72,6 @@ uses CONFIG_UDELAY_TSC uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 uses CONFIG_PCI_ROM_RUN uses CONFIG_CONSOLE_VGA -uses CONFIG_MAX_PCI_BUSES uses CONFIG_SMP uses CONFIG_IOAPIC @@ -185,15 +184,6 @@ default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" default HOSTCC="gcc" ## -## Set this to the max PCI bus number you -## would ever use for PCI config IO. -## Setting this number very high will make -## pci_locate_device take a long time when -## it can't find a device. -## -default CONFIG_MAX_PCI_BUSES = 0x80 - -## ## Disable the gdb stub by default ## default CONFIG_GDB_STUB=0 |