Kconfig!

Works on Kontron, qemu, and serengeti. 

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>

tested on abuild only. 

Acked-by: Ronald G. Minnich <rminnich@gmail.com>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4534 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

2 files changed, 123 insertions, 0 deletions

diff --git a/src/mainboard/via/vt8454c/Makefile.inc b/src/mainboard/via/vt8454c/Makefile.inc
new file mode 100644
index 0000000000..d74c632497
--- /dev/null
+++ b/src/mainboard/via/vt8454c/Makefile.inc
@@ -0,0 +1,64 @@
+##
+## This file is part of the coreboot project.
+## 
+## Copyright (C) 2007-2009 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or
+## modify it under the terms of the GNU General Public License as
+## published by the Free Software Foundation; version 2 of
+## the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+## MA 02110-1301 USA
+##
+
+##
+## This mainboard requires DCACHE_AS_RAM enabled. It won't work without.
+## 
+
+driver-y +=  mainboard.o
+
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) +=  dsdt.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) +=  acpi_tables.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) +=  fadt.o
+
+initobj-y += crt0.o
+# FIXME in $(top)/Makefile
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/cpu/via/car/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+
+ifdef POST_EVALUATION
+
+$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
+	iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
+	mv dsdt.hex $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+	perl -e 's/\.rodata/.rom.data/g' -pi $@
+	perl -e 's/\.text/.section .rom.text/g' -pi $@
+
+endif
+
diff --git a/src/mainboard/via/vt8454c/devicetree.cb b/src/mainboard/via/vt8454c/devicetree.cb
new file mode 100644
index 0000000000..02f9514984
--- /dev/null
+++ b/src/mainboard/via/vt8454c/devicetree.cb
@@ -0,0 +1,59 @@
+chip northbridge/via/cx700
+	device apic_cluster 0 on
+		chip cpu/via/model_c7
+			device apic 0 on end
+		end
+	end
+	device pci_domain 0 on
+		device pci 0.0 on end # AGP Bridge
+		device pci 0.1 on end # Error Reporting
+		device pci 0.2 on end # Host Bus Control
+		device pci 0.3 on end # Memory Controller
+		device pci 0.4 on end # Power Management
+		device pci 0.7 on end # V-Link Controller
+		device pci 1.0 on     # PCI Bridge
+			chip drivers/pci/onboard
+				device pci 0.0 on end
+				#register "rom_address" = "0xfffc0000" #256k image
+				register "rom_address" = "0xfff80000" #512k image
+				#register "rom_address" = "0xfff00000" #1024k image
+			end # Onboard Video
+		end # PCI Bridge
+		device pci f.0 on end # IDE/SATA
+		#device pci f.1 on end # IDE
+		device pci 10.0 on end # USB 1.1
+		device pci 10.1 on end # USB 1.1
+		device pci 10.2 on end # USB 1.1
+		device pci 10.4 on end # USB 2.0
+		device pci 11.0 on      # Southbridge LPC
+			chip superio/via/vt1211
+				device pnp 2e.0 on	# Floppy
+					io 0x60 = 0x3f0
+					irq 0x70 = 6
+					drq 0x74 = 2
+				end
+				device pnp 2e.1 on	# Parallel Port
+					io 0x60 = 0x378
+					irq 0x70 = 7
+					drq 0x74 = 3
+				end
+				device pnp 2e.2 on	# COM1
+					io 0x60 = 0x3f8
+					irq 0x70 = 4
+				end
+				device pnp 2e.3 on	# COM2
+					io 0x60 = 0x2f8
+					irq 0x70 = 3
+				end
+				device pnp 2e.b on	# HWM
+					io 0x60 = 0xec00
+				end
+			end # superio
+		end # pci 11.0
+		# 1-4 non existant
+		#device pci 11.5 on end # AC97 Audio
+		#device pci 11.6 off end # AC97 Modem
+		#device pci 12.0 on end  # Ethernet
+	end # pci domain 0
+end # cx700
+