Since some people disapprove of white space cleanups mixed in regular commits

while others dislike them being extra commits, let's clean them up once and
for all for the existing code. If it's ugly, let it only be ugly once :-)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

18 files changed, 264 insertions, 264 deletions

diff --git a/src/mainboard/via/epia-cn/romstage.c b/src/mainboard/via/epia-cn/romstage.c
index 74cd29a5f4..6d37e6bdf9 100644
--- a/src/mainboard/via/epia-cn/romstage.c
+++ b/src/mainboard/via/epia-cn/romstage.c
@@ -47,7 +47,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 static void enable_mainboard_devices(void)
 {
 	device_t dev;
- 
+
 	dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT8237R_LPC), 0);
 	if (dev == PCI_DEV_INVALID)
 		die("Southbridge not found!!!\n");
diff --git a/src/mainboard/via/epia-m/acpi_tables.c b/src/mainboard/via/epia-m/acpi_tables.c
index 69c526c1fe..9e42bc25a5 100644
--- a/src/mainboard/via/epia-m/acpi_tables.c
+++ b/src/mainboard/via/epia-m/acpi_tables.c
@@ -1,7 +1,7 @@
 /*
  * coreboot ACPI Table support
  * written by Stefan Reinauer <stepan@openbios.org>
- * ACPI FADT, FACS, and DSDT table support added by 
+ * ACPI FADT, FACS, and DSDT table support added by
  * Nick Barker <nick.barker9@btinternet.com>, and those portions
  * (C) Copyright 2004 Nick Barker
  * (C) Copyright 2005 Stefan Reinauer
@@ -45,11 +45,11 @@ unsigned long write_acpi_tables(unsigned long start)
 	acpi_fadt_t *fadt;
 	acpi_facs_t *facs;
 	acpi_header_t *dsdt;
-	
+
 	/* Align ACPI tables to 16byte */
 	start   = ( start + 0x0f ) & -0x10;
 	current = start;
-	
+
 	printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx...\n", start);
 
 	/* We need at least an RSDP and an RSDT Table */
@@ -60,10 +60,10 @@ unsigned long write_acpi_tables(unsigned long start)
 
 	/* clear all table memory */
 	memset((void *)start, 0, current - start);
-	
+
 	acpi_write_rsdp(rsdp, rsdt, NULL);
 	acpi_write_rsdt(rsdt);
-	
+
 	/*
 	 * We explicitly add these tables later on:
 	 */
diff --git a/src/mainboard/via/epia-m/devicetree.cb b/src/mainboard/via/epia-m/devicetree.cb
index e49090e789..ed543a21aa 100644
--- a/src/mainboard/via/epia-m/devicetree.cb
+++ b/src/mainboard/via/epia-m/devicetree.cb
@@ -2,7 +2,7 @@ chip northbridge/via/vt8623
 
 	device apic_cluster 0 on
 		chip cpu/via/model_c3
-			device apic 0 on  end 
+			device apic 0 on  end
 		end
 	end
 
@@ -44,7 +44,7 @@ chip northbridge/via/vt8623
 
 				end
 			end
-			
+
 			device pci 11.1 on  end # IDE
 			# 2-4 non existant?
 			device pci 11.5 on  end # AC97 Audio
@@ -55,7 +55,7 @@ chip northbridge/via/vt8623
 		chip southbridge/ricoh/rl5c476
 			register "enable_cf" = "1"
 			device pci 0a.0 on end
-			device pci 0a.1 on end	
+			device pci 0a.1 on end
 		end
 	end
 end
diff --git a/src/mainboard/via/epia-m/dsdt.asl b/src/mainboard/via/epia-m/dsdt.asl
index b1b791d5f2..cbc8d24e41 100644
--- a/src/mainboard/via/epia-m/dsdt.asl
+++ b/src/mainboard/via/epia-m/dsdt.asl
@@ -2,12 +2,12 @@
  * Minimalist ACPI DSDT table for EPIA-M / MII
  * (C) Copyright 2004 Nick Barker <Nick.Barker9@btinternet.com>
  *
- * 
+ *
  */
 
 DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
 {
-	/*  
+	/*
 	 * Define the main processor
 	 */
 	Scope (\_PR)
@@ -26,7 +26,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
 	/* Root of the bus hierarchy */
 	Scope (\_SB)
     	{
-		/* Define how interrupt Link A is plumbed in */ 
+		/* Define how interrupt Link A is plumbed in */
 		Device (LNKA)
 		{
 			Name (_HID, EisaId ("PNP0C0F"))
@@ -36,7 +36,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
 			{
 				Return (0x0B)
  			}
-			/* Current Resources - return irq set up in BIOS */  
+			/* Current Resources - return irq set up in BIOS */
 			Method (_CRS, 0, NotSerialized)
 			{
 				Name (BUFF, ResourceTemplate ()
@@ -47,7 +47,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                 	}
 			/* Possible Resources - return the range of irqs
  			 * we are using for PCI - only here to keep Linux ACPI
-			 * happy 
+			 * happy
 			 */
 			Method (_PRS, 0, NotSerialized)
 			{
@@ -59,16 +59,16 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                 	}
 			/* Set Resources - dummy function to keep Linux ACPI happy
                          * Linux is more than happy not to tinker with irq
-			 * assignments as long as the CRS and STA functions 
+			 * assignments as long as the CRS and STA functions
 			 * return good values
 			 */
 			Method (_SRS, 1, NotSerialized ) {}
 			/* Disable - dummy function to keep Linux ACPI happy */
 			Method (_DIS, 0, NotSerialized ) {}
- 
-		} // End of LNKA 
 
-		/* Define how interrupt Link B is plumbed in */ 
+		} // End of LNKA
+
+		/* Define how interrupt Link B is plumbed in */
 		Device (LNKB)
 		{
 			Name (_HID, EisaId ("PNP0C0F"))
@@ -78,7 +78,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
 			{
 				Return (0x0B)
  			}
-			/* Current Resources - return irq set up in BIOS */  
+			/* Current Resources - return irq set up in BIOS */
 			Method (_CRS, 0, NotSerialized)
 			{
 				Name (BUFF, ResourceTemplate ()
@@ -89,7 +89,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                 	}
 			/* Possible Resources - return the range of irqs
 			 * we are using for PCI - only here to keep Linux ACPI
-			 * happy 
+			 * happy
 			 */
 			Method (_PRS, 0, NotSerialized)
 			{
@@ -101,16 +101,16 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                 	}
 			/* Set Resources - dummy function to keep Linux ACPI happy
                          * Linux is more than happy not to tinker with irq
-			 * assignments as long as the CRS and STA functions 
+			 * assignments as long as the CRS and STA functions
 			 * return good values
 			 */
 			Method (_SRS, 1, NotSerialized ) {}
 			/* Disable - dummy function to keep Linux ACPI happy */
 			Method (_DIS, 0, NotSerialized ) {}
- 
+
 		} // End of LNKB
 
-		/* Define how interrupt Link C is plumbed in */ 
+		/* Define how interrupt Link C is plumbed in */
 		Device (LNKC)
 		{
 			Name (_HID, EisaId ("PNP0C0F"))
@@ -120,7 +120,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
 			{
 				Return (0x0B)
  			}
-			/* Current Resources - return irq set up in BIOS */  
+			/* Current Resources - return irq set up in BIOS */
 			Method (_CRS, 0, NotSerialized)
 			{
 				Name (BUFF, ResourceTemplate ()
@@ -131,7 +131,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                 	}
 			/* Possible Resources - return the range of irqs
 			 * we are using for PCI - only here to keep Linux ACPI
-			 * happy 
+			 * happy
 			 */
 			Method (_PRS, 0, NotSerialized)
 			{
@@ -143,16 +143,16 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                 	}
 			/* Set Resources - dummy function to keep Linux ACPI happy
                          * Linux is more than happy not to tinker with irq
-			 * assignments as long as the CRS and STA functions 
+			 * assignments as long as the CRS and STA functions
 			 * return good values
 			 */
 			Method (_SRS, 1, NotSerialized ) {}
 			/* Disable - dummy function to keep Linux ACPI happy */
 			Method (_DIS, 0, NotSerialized ) {}
- 
+
 		} // End of LNKC
 
-		/* Define how interrupt Link D is plumbed in */ 
+		/* Define how interrupt Link D is plumbed in */
 		Device (LNKD)
 		{
 			Name (_HID, EisaId ("PNP0C0F"))
@@ -162,7 +162,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
 			{
 				Return (0x0B)
  			}
-			/* Current Resources - return irq set up in BIOS */  
+			/* Current Resources - return irq set up in BIOS */
 			Method (_CRS, 0, NotSerialized)
 			{
 				Name (BUFF, ResourceTemplate ()
@@ -173,7 +173,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                 	}
 			/* Possible Resources - return the range of irqs
 			 * we are using for PCI - only here to keep Linux ACPI
-			 * happy 
+			 * happy
 			 */
 			Method (_PRS, 0, NotSerialized)
 			{
@@ -185,16 +185,16 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                 	}
 			/* Set Resources - dummy function to keep Linux ACPI happy
                          * Linux is more than happy not to tinker with irq
-			 * assignments as long as the CRS and STA functions 
+			 * assignments as long as the CRS and STA functions
 			 * return good values
 			 */
 			Method (_SRS, 1, NotSerialized ) {}
 			/* Disable - dummy function to keep Linux ACPI happy */
 			Method (_DIS, 0, NotSerialized ) {}
- 
-		} // End of LNKD 
 
- 
+		} // End of LNKD
+
+
 		/* top PCI device */
 		Device (PCI0)
 		{
@@ -226,12 +226,12 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
 				Package () {0x0011FFFF, 0x02, LNKC, 0x00}, // vt8623 Link C
 				Package () {0x0011FFFF, 0x03, LNKD, 0x00}, // vt8623 Link D
 
-				Package () {0x0012FFFF, 0x00, LNKA, 0x00}, // LAN Link A 
+				Package () {0x0012FFFF, 0x00, LNKA, 0x00}, // LAN Link A
 				Package () {0x0012FFFF, 0x01, LNKB, 0x00}, // LAN Link B
 				Package () {0x0012FFFF, 0x02, LNKC, 0x00}, // LAN Link C
 				Package () {0x0012FFFF, 0x03, LNKD, 0x00}, // LAN Link D
 
-				Package () {0x0013FFFF, 0x00, LNKA, 0x00}, // Riser slot LinkA 
+				Package () {0x0013FFFF, 0x00, LNKA, 0x00}, // Riser slot LinkA
 				Package () {0x0013FFFF, 0x01, LNKB, 0x00}, // Riser slot LinkB
 				Package () {0x0013FFFF, 0x02, LNKC, 0x00}, // Riser slot LinkC
 				Package () {0x0013FFFF, 0x03, LNKD, 0x00}, // Riser slot LinkD
@@ -240,7 +240,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
 				Package () {0x0014FFFF, 0x01, LNKC, 0x00}, // Slot 1, Link C
 				Package () {0x0014FFFF, 0x02, LNKD, 0x00}, // Slot 1, Link D
 				Package () {0x0014FFFF, 0x03, LNKA, 0x00}, // Slot 1, Link A
-                
+
 				Package () {0x0001FFFF, 0x00, LNKA, 0x00}, // VGA Link A
 				Package () {0x0001FFFF, 0x01, LNKB, 0x00}, // VGA Link B
 				Package () {0x0001FFFF, 0x02, LNKC, 0x00}, // VGA Link C
diff --git a/src/mainboard/via/epia-m/dsdt.c b/src/mainboard/via/epia-m/dsdt.c
index fa878250f5..ca40651973 100644
--- a/src/mainboard/via/epia-m/dsdt.c
+++ b/src/mainboard/via/epia-m/dsdt.c
@@ -1,12 +1,12 @@
 /*
- * 
+ *
  * Intel ACPI Component Architecture
  * ASL Optimizing Compiler version 20060127 [Apr 23 2006]
  * Copyright (C) 2000 - 2006 Intel Corporation
  * Supports ACPI Specification Revision 3.0a
- * 
+ *
  * Compilation of "dsdt.asl" - Wed Sep  6 11:36:08 2006
- * 
+ *
  * C source code output
  *
  */
diff --git a/src/mainboard/via/epia-m/irq_tables.c b/src/mainboard/via/epia-m/irq_tables.c
index 551db214a8..f7776f6d20 100644
--- a/src/mainboard/via/epia-m/irq_tables.c
+++ b/src/mainboard/via/epia-m/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!
    (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *
diff --git a/src/mainboard/via/epia-m/romstage.c b/src/mainboard/via/epia-m/romstage.c
index 6a8446ac04..54feb26552 100644
--- a/src/mainboard/via/epia-m/romstage.c
+++ b/src/mainboard/via/epia-m/romstage.c
@@ -26,27 +26,27 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "northbridge/via/vt8623/raminit.c"
 
-static void enable_mainboard_devices(void) 
+static void enable_mainboard_devices(void)
 {
 	device_t dev;
-  
+
 	dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA,
 				PCI_DEVICE_ID_VIA_8235), 0);
-  
+
 	if (dev == PCI_DEV_INVALID) {
 		die("Southbridge not found!!!\n");
 	}
 	pci_write_config8(dev, 0x50, 0x80);
 	pci_write_config8(dev, 0x51, 0x1f);
 #if 0
-	// This early setup switches IDE into compatibility mode before PCI gets 
+	// This early setup switches IDE into compatibility mode before PCI gets
 	// a chance to assign I/Os
 	// movl    $CONFIG_ADDR(0, 0x89, 0x42), %eax
 	// //      movb    $0x09, %dl
 	// movb    $0x00, %dl
 	// PCI_WRITE_CONFIG_BYTE
 #endif
-	/* we do this here as in V2, we can not yet do raw operations 
+	/* we do this here as in V2, we can not yet do raw operations
 	 * to pci!
 	 */
         dev += 0x100; /* ICKY */
@@ -58,7 +58,7 @@ static void enable_mainboard_devices(void)
 	pci_write_config8(dev, 0x3d, 0);
 }
 
-static void enable_shadow_ram(void) 
+static void enable_shadow_ram(void)
 {
 	device_t dev = 0; /* no need to look up 0:0.0 */
 	unsigned char shadowreg;
@@ -108,7 +108,7 @@ static void main(unsigned long bist)
 	enable_shadow_ram();
 
 	ddr_ram_setup((const struct mem_controller *)0);
-	
+
 	/* Check all of memory */
 #if 0
 	static const struct {
@@ -129,7 +129,7 @@ static void main(unsigned long bist)
 	}
 
 	//dump_pci_devices();
-	
+
 	print_spew("Leaving romstage.c:main()\n");
 }
 
diff --git a/src/mainboard/via/epia-m700/romstage.c b/src/mainboard/via/epia-m700/romstage.c
index 2e51c958d0..ac2e202d6a 100644
--- a/src/mainboard/via/epia-m700/romstage.c
+++ b/src/mainboard/via/epia-m700/romstage.c
@@ -547,7 +547,7 @@ void main(unsigned long bist)
 	/*
 	 * For coreboot most time of S3 resume is the same as normal boot,
 	 * so some memory area under 1M become dirty, so before this happen,
-	 * I need to backup the content of mem to top-mem. 
+	 * I need to backup the content of mem to top-mem.
 	 *
 	 * I will reserve the 1M top-men in LBIO table in coreboot_table.c
 	 * and recovery the content of 1M-mem in wakeup.c.
@@ -628,7 +628,7 @@ void main(unsigned long bist)
 		);
 #endif
 
-		/* 
+		/*
 		 * WAKE_MEM_INFO is inited in get_set_top_available_mem()
 		 * in tables.c these two memcpy() not not be enabled if set
 		 * the MTRR around this two lines.
diff --git a/src/mainboard/via/epia-n/acpi_tables.c b/src/mainboard/via/epia-n/acpi_tables.c
index 1944b18de6..7cfa15114c 100644
--- a/src/mainboard/via/epia-n/acpi_tables.c
+++ b/src/mainboard/via/epia-n/acpi_tables.c
@@ -1,7 +1,7 @@
 /*
  * coreboot ACPI Table support
  * written by Stefan Reinauer <stepan@openbios.org>
- * ACPI FADT, FACS, and DSDT table support added by 
+ * ACPI FADT, FACS, and DSDT table support added by
  * Nick Barker <nick.barker9@btinternet.com>, and those portions
  * (C) Copyright 2004 Nick Barker
  * (C) Copyright 2005 Stefan Reinauer
@@ -130,11 +130,11 @@ unsigned long write_acpi_tables(unsigned long start)
 	acpi_fadt_t *fadt;
 	acpi_facs_t *facs;
 	acpi_header_t *dsdt;
-	
+
 	/* Align ACPI tables to 16byte */
 	start   = ( start + 0x0f ) & -0x10;
 	current = start;
-	
+
 	printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx...\n", start);
 
 	/* We need at least an RSDP and an RSDT Table */
@@ -145,10 +145,10 @@ unsigned long write_acpi_tables(unsigned long start)
 
 	/* clear all table memory */
 	memset((void *)start, 0, current - start);
-	
+
 	acpi_write_rsdp(rsdp, rsdt, NULL);
 	acpi_write_rsdt(rsdt);
-	
+
 	/*
 	 * We explicitly add these tables later on:
 	 */
diff --git a/src/mainboard/via/epia-n/dsdt.asl b/src/mainboard/via/epia-n/dsdt.asl
index 90731501ed..e50ee6b50c 100644
--- a/src/mainboard/via/epia-n/dsdt.asl
+++ b/src/mainboard/via/epia-n/dsdt.asl
@@ -3,7 +3,7 @@
  * (C) Copyright 2009 Jon Harrison <jon.harrison@blueyonder.co.uk>
  * Heavily based on EPIA-M dstd.asl
  * (C) Copyright 2004 Nick Barker <Nick.Barker9@btinternet.com>
- * 
+ *
  */
 DefinitionBlock ("dsdt.aml", "DSDT", 1, "CBT-V2", "CBT-DSDT", 1)
 {
diff --git a/src/mainboard/via/epia-n/romstage.c b/src/mainboard/via/epia-n/romstage.c
index 6ca72f293e..df9f82ea9b 100644
--- a/src/mainboard/via/epia-n/romstage.c
+++ b/src/mainboard/via/epia-n/romstage.c
@@ -41,8 +41,8 @@
 #define SERIAL_DEV PNP_DEV(0x2e, W83697HF_SP1)
 
 /*
- * NOOB ::			
- * d0f0 - Device 0 Function 0 etc. 
+ * NOOB ::
+ * d0f0 - Device 0 Function 0 etc.
  */
 static const struct mem_controller ctrl = {
 	.d0f0 = 0x0000,
@@ -65,7 +65,7 @@ static void enable_mainboard_devices(void)
 {
 	device_t dev;
 	u8 reg;
- 
+
 	dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT8237R_LPC), 0);
 	if (dev == PCI_DEV_INVALID)
 		die("Southbridge not found!!!\n");
@@ -95,10 +95,10 @@ static void enable_mainboard_devices(void)
 	pci_write_config8(dev, 0x51, 0x9d);
 }
 
-static void enable_shadow_ram(void) 
+static void enable_shadow_ram(void)
 {
 	unsigned char shadowreg;
-	
+
 	shadowreg = pci_read_config8(ctrl.d0f3, 0x82);
 	/* 0xf0000-0xfffff Read/Write*/
 	shadowreg |= 0x30;
@@ -133,10 +133,10 @@ static void main(unsigned long bist)
 
 	print_debug("Enable F-ROM Shadow RAM\n");
 	enable_shadow_ram();
-	
+
 	/* setup cpu */
 	print_debug("Setup CPU Interface\n");
-	c3_cpu_setup(ctrl.d0f2);	
+	c3_cpu_setup(ctrl.d0f2);
 
 	ddr_ram_setup();
 
@@ -144,7 +144,7 @@ static void main(unsigned long bist)
 		print_debug("doing early_mtrr\n");
 		early_mtrr_init();
 	}
-	
+
 	//ram_check(0, 640 * 1024);
 
 	print_spew("Leaving romstage.c:main()\n");
diff --git a/src/mainboard/via/epia/irq_tables.c b/src/mainboard/via/epia/irq_tables.c
index f3978d5e81..8b4352d25a 100644
--- a/src/mainboard/via/epia/irq_tables.c
+++ b/src/mainboard/via/epia/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
diff --git a/src/mainboard/via/epia/romstage.c b/src/mainboard/via/epia/romstage.c
index 202b117a42..66a8d203ed 100644
--- a/src/mainboard/via/epia/romstage.c
+++ b/src/mainboard/via/epia/romstage.c
@@ -27,13 +27,13 @@ static inline int spd_read_byte(unsigned device, unsigned address)
   #include "lib/generic_sdram.c"
 */
 
-static void enable_mainboard_devices(void) 
+static void enable_mainboard_devices(void)
 {
 	device_t dev;
 	/* dev 0 for southbridge */
-  
+
 	dev = pci_locate_device(PCI_ID(0x1106,0x8231), 0);
-  
+
 	if (dev == PCI_DEV_INVALID) {
 		die("Southbridge not found!!!\n");
 	}
@@ -41,7 +41,7 @@ static void enable_mainboard_devices(void)
 	pci_write_config8(dev, 0x50, 7);
 	pci_write_config8(dev, 0x51, 0xff);
 #if 0
-	// This early setup switches IDE into compatibility mode before PCI gets 
+	// This early setup switches IDE into compatibility mode before PCI gets
 	// a chance to assign I/Os
 	//   movl    $CONFIG_ADDR(0, 0x89, 0x42), %eax
 	//   movb    $0x09, %dl
@@ -49,7 +49,7 @@ static void enable_mainboard_devices(void)
 	//   PCI_WRITE_CONFIG_BYTE
 	//
 #endif
-	/* we do this here as in V2, we can not yet do raw operations 
+	/* we do this here as in V2, we can not yet do raw operations
 	 * to pci!
 	 */
 	/* changed this to work correctly on later revisions of LB.
@@ -64,7 +64,7 @@ static void enable_mainboard_devices(void)
 	pci_write_config8(dev, 0x42, 0);
 }
 
-static void enable_shadow_ram(void) 
+static void enable_shadow_ram(void)
 {
 	device_t dev = 0;
 	unsigned char shadowreg;
@@ -86,7 +86,7 @@ static void main(unsigned long bist)
 
 	/* Halt if there was a built in self test failure */
 	report_bist_failure(bist);
-	
+
 	enable_mainboard_devices();
 	enable_smbus();
 	enable_shadow_ram();
@@ -98,7 +98,7 @@ static void main(unsigned long bist)
 	sdram_set_registers((const struct mem_controller *) 0);
 	sdram_set_spd_registers((const struct mem_controller *) 0);
 	sdram_enable(0, (const struct mem_controller *) 0);
-	
+
 	/* Check all of memory */
 #if 0
 	ram_check(0x00000000, msr.lo);
diff --git a/src/mainboard/via/vt8454c/acpi/irq-p2p-bridge.asl b/src/mainboard/via/vt8454c/acpi/irq-p2p-bridge.asl
index 4a294bcbaa..1505683563 100644
--- a/src/mainboard/via/vt8454c/acpi/irq-p2p-bridge.asl
+++ b/src/mainboard/via/vt8454c/acpi/irq-p2p-bridge.asl
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
@@ -22,67 +22,67 @@
 Name (PICM, Package () {
 	//           _ADR        PIN   SRC   IDX
 
-	Package () { 0x0003FFFF, 0x00, LNKA, 0x00 }, 
-	Package () { 0x0003FFFF, 0x01, LNKB, 0x00 }, 
-	Package () { 0x0003FFFF, 0x02, LNKC, 0x00 }, 
-	Package () { 0x0003FFFF, 0x03, LNKD, 0x00 }, 
-	
-	Package () { 0x0004FFFF, 0x00, LNKB, 0x00 }, 
-	Package () { 0x0004FFFF, 0x01, LNKC, 0x00 }, 
-	Package () { 0x0004FFFF, 0x02, LNKD, 0x00 }, 
-	Package () { 0x0004FFFF, 0x03, LNKA, 0x00 }, 
-	
-	Package () { 0x0005FFFF, 0x00, LNKC, 0x00 }, 
-	Package () { 0x0005FFFF, 0x01, LNKD, 0x00 }, 
-	Package () { 0x0005FFFF, 0x02, LNKA, 0x00 }, 
-	Package () { 0x0005FFFF, 0x03, LNKB, 0x00 }, 
-	
-	Package () { 0x0006FFFF, 0x00, LNKD, 0x00 }, 
-	Package () { 0x0006FFFF, 0x01, LNKA, 0x00 }, 
-	Package () { 0x0006FFFF, 0x02, LNKB, 0x00 }, 
-	Package () { 0x0006FFFF, 0x03, LNKC, 0x00 }, 
-	
-	Package () { 0x0007FFFF, 0x00, LNKA, 0x00 }, 
-	Package () { 0x0007FFFF, 0x01, LNKB, 0x00 }, 
-	Package () { 0x0007FFFF, 0x02, LNKC, 0x00 }, 
-	Package () { 0x0007FFFF, 0x03, LNKD, 0x00 }, 
-	
-	Package () { 0x0008FFFF, 0x00, LNKB, 0x00 }, 
-	Package () { 0x0008FFFF, 0x01, LNKC, 0x00 }, 
-	Package () { 0x0008FFFF, 0x02, LNKD, 0x00 }, 
-	Package () { 0x0008FFFF, 0x03, LNKA, 0x00 }, 
+	Package () { 0x0003FFFF, 0x00, LNKA, 0x00 },
+	Package () { 0x0003FFFF, 0x01, LNKB, 0x00 },
+	Package () { 0x0003FFFF, 0x02, LNKC, 0x00 },
+	Package () { 0x0003FFFF, 0x03, LNKD, 0x00 },
+
+	Package () { 0x0004FFFF, 0x00, LNKB, 0x00 },
+	Package () { 0x0004FFFF, 0x01, LNKC, 0x00 },
+	Package () { 0x0004FFFF, 0x02, LNKD, 0x00 },
+	Package () { 0x0004FFFF, 0x03, LNKA, 0x00 },
+
+	Package () { 0x0005FFFF, 0x00, LNKC, 0x00 },
+	Package () { 0x0005FFFF, 0x01, LNKD, 0x00 },
+	Package () { 0x0005FFFF, 0x02, LNKA, 0x00 },
+	Package () { 0x0005FFFF, 0x03, LNKB, 0x00 },
+
+	Package () { 0x0006FFFF, 0x00, LNKD, 0x00 },
+	Package () { 0x0006FFFF, 0x01, LNKA, 0x00 },
+	Package () { 0x0006FFFF, 0x02, LNKB, 0x00 },
+	Package () { 0x0006FFFF, 0x03, LNKC, 0x00 },
+
+	Package () { 0x0007FFFF, 0x00, LNKA, 0x00 },
+	Package () { 0x0007FFFF, 0x01, LNKB, 0x00 },
+	Package () { 0x0007FFFF, 0x02, LNKC, 0x00 },
+	Package () { 0x0007FFFF, 0x03, LNKD, 0x00 },
+
+	Package () { 0x0008FFFF, 0x00, LNKB, 0x00 },
+	Package () { 0x0008FFFF, 0x01, LNKC, 0x00 },
+	Package () { 0x0008FFFF, 0x02, LNKD, 0x00 },
+	Package () { 0x0008FFFF, 0x03, LNKA, 0x00 },
 })
 
 Name (APIC, Package () {
-	Package () { 0x0003FFFF, 0x00, 0x00, 0x10 }, 
-	Package () { 0x0003FFFF, 0x01, 0x00, 0x11 }, 
-	Package () { 0x0003FFFF, 0x02, 0x00, 0x12 }, 
-	Package () { 0x0003FFFF, 0x03, 0x00, 0x13 }, 
+	Package () { 0x0003FFFF, 0x00, 0x00, 0x10 },
+	Package () { 0x0003FFFF, 0x01, 0x00, 0x11 },
+	Package () { 0x0003FFFF, 0x02, 0x00, 0x12 },
+	Package () { 0x0003FFFF, 0x03, 0x00, 0x13 },
 
-	Package () { 0x0004FFFF, 0x00, 0x00, 0x11 }, 
-	Package () { 0x0004FFFF, 0x01, 0x00, 0x12 }, 
-	Package () { 0x0004FFFF, 0x02, 0x00, 0x13 }, 
-	Package () { 0x0004FFFF, 0x03, 0x00, 0x10 }, 
+	Package () { 0x0004FFFF, 0x00, 0x00, 0x11 },
+	Package () { 0x0004FFFF, 0x01, 0x00, 0x12 },
+	Package () { 0x0004FFFF, 0x02, 0x00, 0x13 },
+	Package () { 0x0004FFFF, 0x03, 0x00, 0x10 },
 
-	Package () { 0x0005FFFF, 0x00, 0x00, 0x12 }, 
-	Package () { 0x0005FFFF, 0x01, 0x00, 0x13 }, 
-	Package () { 0x0005FFFF, 0x02, 0x00, 0x10 }, 
-	Package () { 0x0005FFFF, 0x03, 0x00, 0x11 }, 
+	Package () { 0x0005FFFF, 0x00, 0x00, 0x12 },
+	Package () { 0x0005FFFF, 0x01, 0x00, 0x13 },
+	Package () { 0x0005FFFF, 0x02, 0x00, 0x10 },
+	Package () { 0x0005FFFF, 0x03, 0x00, 0x11 },
 
-	Package () { 0x0006FFFF, 0x00, 0x00, 0x13 }, 
-	Package () { 0x0006FFFF, 0x01, 0x00, 0x10 }, 
-	Package () { 0x0006FFFF, 0x02, 0x00, 0x11 }, 
-	Package () { 0x0006FFFF, 0x03, 0x00, 0x12 }, 
+	Package () { 0x0006FFFF, 0x00, 0x00, 0x13 },
+	Package () { 0x0006FFFF, 0x01, 0x00, 0x10 },
+	Package () { 0x0006FFFF, 0x02, 0x00, 0x11 },
+	Package () { 0x0006FFFF, 0x03, 0x00, 0x12 },
 
-	Package () { 0x0007FFFF, 0x00, 0x00, 0x10 }, 
-	Package () { 0x0007FFFF, 0x01, 0x00, 0x11 }, 
-	Package () { 0x0007FFFF, 0x02, 0x00, 0x12 }, 
-	Package () { 0x0007FFFF, 0x03, 0x00, 0x13 }, 
+	Package () { 0x0007FFFF, 0x00, 0x00, 0x10 },
+	Package () { 0x0007FFFF, 0x01, 0x00, 0x11 },
+	Package () { 0x0007FFFF, 0x02, 0x00, 0x12 },
+	Package () { 0x0007FFFF, 0x03, 0x00, 0x13 },
 
-	Package () { 0x0008FFFF, 0x00, 0x00, 0x11 }, 
-	Package () { 0x0008FFFF, 0x01, 0x00, 0x12 }, 
-	Package () { 0x0008FFFF, 0x02, 0x00, 0x13 }, 
-	Package () { 0x0008FFFF, 0x03, 0x00, 0x10 }, 
+	Package () { 0x0008FFFF, 0x00, 0x00, 0x11 },
+	Package () { 0x0008FFFF, 0x01, 0x00, 0x12 },
+	Package () { 0x0008FFFF, 0x02, 0x00, 0x13 },
+	Package () { 0x0008FFFF, 0x03, 0x00, 0x10 },
 })
 
 
diff --git a/src/mainboard/via/vt8454c/acpi/irq.asl b/src/mainboard/via/vt8454c/acpi/irq.asl
index 63e64e61c0..a0bc380b78 100644
--- a/src/mainboard/via/vt8454c/acpi/irq.asl
+++ b/src/mainboard/via/vt8454c/acpi/irq.asl
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
@@ -22,122 +22,122 @@
 Name (PICM, Package () {
 	//           _ADR        PIN   SRC   IDX
 
-	Package () { 0x0001FFFF, 0x00, LNKA, 0x00 }, 
-	Package () { 0x0001FFFF, 0x01, LNKB, 0x00 }, 
-	Package () { 0x0001FFFF, 0x02, LNKC, 0x00 }, 
-	Package () { 0x0001FFFF, 0x03, LNKD, 0x00 }, 
-	
-	Package () { 0x0008FFFF, 0x00, LNKB, 0x00 }, 
-	Package () { 0x0008FFFF, 0x01, LNKC, 0x00 }, 
-	Package () { 0x0008FFFF, 0x02, LNKD, 0x00 }, 
-	Package () { 0x0008FFFF, 0x03, LNKA, 0x00 }, 
-	
-	Package () { 0x0009FFFF, 0x00, LNKC, 0x00 }, 
-	Package () { 0x0009FFFF, 0x01, LNKD, 0x00 }, 
-	Package () { 0x0009FFFF, 0x02, LNKA, 0x00 }, 
-	Package () { 0x0009FFFF, 0x03, LNKB, 0x00 }, 
-	
-	Package () { 0x000AFFFF, 0x00, LNKD, 0x00 }, 
-	Package () { 0x000AFFFF, 0x01, LNKA, 0x00 }, 
-	Package () { 0x000AFFFF, 0x02, LNKB, 0x00 }, 
-	Package () { 0x000AFFFF, 0x03, LNKC, 0x00 }, 
-	
-	Package () { 0x000BFFFF, 0x00, LNKD, 0x00 }, 
-	Package () { 0x000BFFFF, 0x01, LNKA, 0x00 }, 
-	Package () { 0x000BFFFF, 0x02, LNKB, 0x00 }, 
-	Package () { 0x000BFFFF, 0x03, LNKC, 0x00 }, 
-	
-	Package () { 0x000CFFFF, 0x00, LNKA, 0x00 }, 
-	Package () { 0x000CFFFF, 0x01, LNKB, 0x00 }, 
-	Package () { 0x000CFFFF, 0x02, LNKC, 0x00 }, 
-	Package () { 0x000CFFFF, 0x03, LNKD, 0x00 }, 
-	
-	Package () { 0x000DFFFF, 0x00, LNKA, 0x00 }, 
-	Package () { 0x000DFFFF, 0x01, LNKB, 0x00 }, 
-	Package () { 0x000DFFFF, 0x02, LNKC, 0x00 }, 
-	Package () { 0x000DFFFF, 0x03, LNKD, 0x00 }, 
-
-	Package () { 0x000FFFFF, 0x00, LNKA, 0x00 }, 
-	Package () { 0x000FFFFF, 0x01, LNKB, 0x00 }, 
-	Package () { 0x000FFFFF, 0x02, LNKC, 0x00 }, 
+	Package () { 0x0001FFFF, 0x00, LNKA, 0x00 },
+	Package () { 0x0001FFFF, 0x01, LNKB, 0x00 },
+	Package () { 0x0001FFFF, 0x02, LNKC, 0x00 },
+	Package () { 0x0001FFFF, 0x03, LNKD, 0x00 },
+
+	Package () { 0x0008FFFF, 0x00, LNKB, 0x00 },
+	Package () { 0x0008FFFF, 0x01, LNKC, 0x00 },
+	Package () { 0x0008FFFF, 0x02, LNKD, 0x00 },
+	Package () { 0x0008FFFF, 0x03, LNKA, 0x00 },
+
+	Package () { 0x0009FFFF, 0x00, LNKC, 0x00 },
+	Package () { 0x0009FFFF, 0x01, LNKD, 0x00 },
+	Package () { 0x0009FFFF, 0x02, LNKA, 0x00 },
+	Package () { 0x0009FFFF, 0x03, LNKB, 0x00 },
+
+	Package () { 0x000AFFFF, 0x00, LNKD, 0x00 },
+	Package () { 0x000AFFFF, 0x01, LNKA, 0x00 },
+	Package () { 0x000AFFFF, 0x02, LNKB, 0x00 },
+	Package () { 0x000AFFFF, 0x03, LNKC, 0x00 },
+
+	Package () { 0x000BFFFF, 0x00, LNKD, 0x00 },
+	Package () { 0x000BFFFF, 0x01, LNKA, 0x00 },
+	Package () { 0x000BFFFF, 0x02, LNKB, 0x00 },
+	Package () { 0x000BFFFF, 0x03, LNKC, 0x00 },
+
+	Package () { 0x000CFFFF, 0x00, LNKA, 0x00 },
+	Package () { 0x000CFFFF, 0x01, LNKB, 0x00 },
+	Package () { 0x000CFFFF, 0x02, LNKC, 0x00 },
+	Package () { 0x000CFFFF, 0x03, LNKD, 0x00 },
+
+	Package () { 0x000DFFFF, 0x00, LNKA, 0x00 },
+	Package () { 0x000DFFFF, 0x01, LNKB, 0x00 },
+	Package () { 0x000DFFFF, 0x02, LNKC, 0x00 },
+	Package () { 0x000DFFFF, 0x03, LNKD, 0x00 },
+
+	Package () { 0x000FFFFF, 0x00, LNKA, 0x00 },
+	Package () { 0x000FFFFF, 0x01, LNKB, 0x00 },
+	Package () { 0x000FFFFF, 0x02, LNKC, 0x00 },
 	Package () { 0x000FFFFF, 0x03, LNKD, 0x00 },
-	
+
 	/* USB controller */
-	Package () { 0x0010FFFF, 0x00, LNKA, 0x00 }, 
-	Package () { 0x0010FFFF, 0x01, LNKB, 0x00 }, 
-	Package () { 0x0010FFFF, 0x02, LNKC, 0x00 }, 
-	Package () { 0x0010FFFF, 0x03, LNKD, 0x00 }, 
-	
-	Package () { 0x0011FFFF, 0x00, LNKA, 0x00 }, 
-	Package () { 0x0011FFFF, 0x01, LNKB, 0x00 }, 
-	Package () { 0x0011FFFF, 0x02, LNKC, 0x00 }, 
-	Package () { 0x0011FFFF, 0x03, LNKD, 0x00 }, 
-	
-	Package () { 0x0012FFFF, 0x00, LNKA, 0x00 }, 
-	Package () { 0x0012FFFF, 0x01, LNKB, 0x00 }, 
-	Package () { 0x0012FFFF, 0x02, LNKC, 0x00 }, 
-	Package () { 0x0012FFFF, 0x03, LNKD, 0x00 } 
+	Package () { 0x0010FFFF, 0x00, LNKA, 0x00 },
+	Package () { 0x0010FFFF, 0x01, LNKB, 0x00 },
+	Package () { 0x0010FFFF, 0x02, LNKC, 0x00 },
+	Package () { 0x0010FFFF, 0x03, LNKD, 0x00 },
+
+	Package () { 0x0011FFFF, 0x00, LNKA, 0x00 },
+	Package () { 0x0011FFFF, 0x01, LNKB, 0x00 },
+	Package () { 0x0011FFFF, 0x02, LNKC, 0x00 },
+	Package () { 0x0011FFFF, 0x03, LNKD, 0x00 },
+
+	Package () { 0x0012FFFF, 0x00, LNKA, 0x00 },
+	Package () { 0x0012FFFF, 0x01, LNKB, 0x00 },
+	Package () { 0x0012FFFF, 0x02, LNKC, 0x00 },
+	Package () { 0x0012FFFF, 0x03, LNKD, 0x00 }
 })
 
 Name (APIC, Package () {
-	Package () { 0x0001FFFF, 0x00, 0x00, 0x10 }, 
-	Package () { 0x0001FFFF, 0x01, 0x00, 0x11 }, 
-	Package () { 0x0001FFFF, 0x02, 0x00, 0x12 }, 
-	Package () { 0x0001FFFF, 0x03, 0x00, 0x13 }, 
-
-	Package () { 0x0008FFFF, 0x00, 0x00, 0x11 }, 
-	Package () { 0x0008FFFF, 0x01, 0x00, 0x12 }, 
-	Package () { 0x0008FFFF, 0x02, 0x00, 0x13 }, 
-	Package () { 0x0008FFFF, 0x03, 0x00, 0x10 }, 
-	
-	Package () { 0x0009FFFF, 0x00, 0x00, 0x12 }, 
-	Package () { 0x0009FFFF, 0x01, 0x00, 0x13 }, 
-	Package () { 0x0009FFFF, 0x02, 0x00, 0x10 }, 
-	Package () { 0x0009FFFF, 0x03, 0x00, 0x11 }, 
-	
-	Package () { 0x000AFFFF, 0x00, 0x00, 0x13 }, 
-	Package () { 0x000AFFFF, 0x01, 0x00, 0x10 }, 
-	Package () { 0x000AFFFF, 0x02, 0x00, 0x11 }, 
-	Package () { 0x000AFFFF, 0x03, 0x00, 0x12 }, 
-	
-	Package () { 0x000BFFFF, 0x00, 0x00, 0x13 }, 
-	Package () { 0x000BFFFF, 0x01, 0x00, 0x10 }, 
-	Package () { 0x000BFFFF, 0x02, 0x00, 0x11 }, 
-	Package () { 0x000BFFFF, 0x03, 0x00, 0x12 }, 
-	
-	Package () { 0x000CFFFF, 0x00, 0x00, 0x10 }, 
-	Package () { 0x000CFFFF, 0x01, 0x00, 0x11 }, 
-	Package () { 0x000CFFFF, 0x02, 0x00, 0x12 }, 
-	Package () { 0x000CFFFF, 0x03, 0x00, 0x13 }, 
-	
-	Package () { 0x000DFFFF, 0x00, 0x00, 0x10 }, 
-	Package () { 0x000DFFFF, 0x01, 0x00, 0x11 }, 
-	Package () { 0x000DFFFF, 0x02, 0x00, 0x12 }, 
-	Package () { 0x000DFFFF, 0x03, 0x00, 0x13 }, 
-		
-	Package () { 0x000FFFFF, 0x00, LNKA, 0x00 }, 
-	Package () { 0x000FFFFF, 0x01, LNKA, 0x00 }, 
-	Package () { 0x000FFFFF, 0x02, LNKA, 0x00 }, 
+	Package () { 0x0001FFFF, 0x00, 0x00, 0x10 },
+	Package () { 0x0001FFFF, 0x01, 0x00, 0x11 },
+	Package () { 0x0001FFFF, 0x02, 0x00, 0x12 },
+	Package () { 0x0001FFFF, 0x03, 0x00, 0x13 },
+
+	Package () { 0x0008FFFF, 0x00, 0x00, 0x11 },
+	Package () { 0x0008FFFF, 0x01, 0x00, 0x12 },
+	Package () { 0x0008FFFF, 0x02, 0x00, 0x13 },
+	Package () { 0x0008FFFF, 0x03, 0x00, 0x10 },
+
+	Package () { 0x0009FFFF, 0x00, 0x00, 0x12 },
+	Package () { 0x0009FFFF, 0x01, 0x00, 0x13 },
+	Package () { 0x0009FFFF, 0x02, 0x00, 0x10 },
+	Package () { 0x0009FFFF, 0x03, 0x00, 0x11 },
+
+	Package () { 0x000AFFFF, 0x00, 0x00, 0x13 },
+	Package () { 0x000AFFFF, 0x01, 0x00, 0x10 },
+	Package () { 0x000AFFFF, 0x02, 0x00, 0x11 },
+	Package () { 0x000AFFFF, 0x03, 0x00, 0x12 },
+
+	Package () { 0x000BFFFF, 0x00, 0x00, 0x13 },
+	Package () { 0x000BFFFF, 0x01, 0x00, 0x10 },
+	Package () { 0x000BFFFF, 0x02, 0x00, 0x11 },
+	Package () { 0x000BFFFF, 0x03, 0x00, 0x12 },
+
+	Package () { 0x000CFFFF, 0x00, 0x00, 0x10 },
+	Package () { 0x000CFFFF, 0x01, 0x00, 0x11 },
+	Package () { 0x000CFFFF, 0x02, 0x00, 0x12 },
+	Package () { 0x000CFFFF, 0x03, 0x00, 0x13 },
+
+	Package () { 0x000DFFFF, 0x00, 0x00, 0x10 },
+	Package () { 0x000DFFFF, 0x01, 0x00, 0x11 },
+	Package () { 0x000DFFFF, 0x02, 0x00, 0x12 },
+	Package () { 0x000DFFFF, 0x03, 0x00, 0x13 },
+
+	Package () { 0x000FFFFF, 0x00, LNKA, 0x00 },
+	Package () { 0x000FFFFF, 0x01, LNKA, 0x00 },
+	Package () { 0x000FFFFF, 0x02, LNKA, 0x00 },
 	Package () { 0x000FFFFF, 0x03, LNKA, 0x00 },
 
 	/* USB controller. Hardwired in internal
            APIC mode, see PM pg. 137,
            "miscellaneous controls", footnote to
            "IDE interrupt select" */
-	Package () { 0x0010FFFF, 0x00, 0x00, 0x14 }, 
-	Package () { 0x0010FFFF, 0x01, 0x00, 0x16 }, 
-	Package () { 0x0010FFFF, 0x02, 0x00, 0x15 }, 
-	Package () { 0x0010FFFF, 0x03, 0x00, 0x17 }, 
-	
-	Package () { 0x0011FFFF, 0x00, LNKA, 0x00 }, 
-	Package () { 0x0011FFFF, 0x01, LNKB, 0x00 }, 
-	Package () { 0x0011FFFF, 0x02, LNKC, 0x00 }, 
-	Package () { 0x0011FFFF, 0x03, LNKD, 0x00 }, 
-
-	Package () { 0x0012FFFF, 0x00, LNKD, 0x00 }, 
-	Package () { 0x0012FFFF, 0x01, LNKD, 0x00 }, 
-	Package () { 0x0012FFFF, 0x02, LNKD, 0x00 }, 
-	Package () { 0x0012FFFF, 0x03, LNKD, 0x00 }, 
+	Package () { 0x0010FFFF, 0x00, 0x00, 0x14 },
+	Package () { 0x0010FFFF, 0x01, 0x00, 0x16 },
+	Package () { 0x0010FFFF, 0x02, 0x00, 0x15 },
+	Package () { 0x0010FFFF, 0x03, 0x00, 0x17 },
+
+	Package () { 0x0011FFFF, 0x00, LNKA, 0x00 },
+	Package () { 0x0011FFFF, 0x01, LNKB, 0x00 },
+	Package () { 0x0011FFFF, 0x02, LNKC, 0x00 },
+	Package () { 0x0011FFFF, 0x03, LNKD, 0x00 },
+
+	Package () { 0x0012FFFF, 0x00, LNKD, 0x00 },
+	Package () { 0x0012FFFF, 0x01, LNKD, 0x00 },
+	Package () { 0x0012FFFF, 0x02, LNKD, 0x00 },
+	Package () { 0x0012FFFF, 0x03, LNKD, 0x00 },
 })
 
 
diff --git a/src/mainboard/via/vt8454c/acpi_tables.c b/src/mainboard/via/vt8454c/acpi_tables.c
index d31d8c55eb..737a5c8b12 100644
--- a/src/mainboard/via/vt8454c/acpi_tables.c
+++ b/src/mainboard/via/vt8454c/acpi_tables.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
diff --git a/src/mainboard/via/vt8454c/dsdt.asl b/src/mainboard/via/vt8454c/dsdt.asl
index ada6c95690..d0ec7db2d0 100644
--- a/src/mainboard/via/vt8454c/dsdt.asl
+++ b/src/mainboard/via/vt8454c/dsdt.asl
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2004 Nick Barker <Nick.Barker9@btinternet.com>
  * Copyright (C) 2007-2009 coresystems GmbH
  *
@@ -22,7 +22,7 @@
 
 DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001)
 {
-	/*  
+	/*
 	 * Define the main processor
 	 */
 	Scope (\_PR)
@@ -38,18 +38,18 @@ DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001)
 	Name (\_S0, Package () {0x00, 0x00, 0x00, 0x00 })
 	Name (\_S5, Package () {0x02, 0x02, 0x00, 0x00 })
 
-	Scope (\) {     
-		Name (PICF , 0)		// Global flag indicating whether to use PIC or APIC mode  
+	Scope (\) {
+		Name (PICF , 0)		// Global flag indicating whether to use PIC or APIC mode
 		Method ( _PIC,1)	// The OS is calling this
 		{
 			Store( Arg0 , PICF)
 		}
-	} // end of \ scope 
+	} // end of \ scope
 
 	/* Root of the bus hierarchy */
 	Scope (\_SB)
     	{
-		/* Define how interrupt Link A is plumbed in */ 
+		/* Define how interrupt Link A is plumbed in */
 		Device (LNKA)
 		{
 			Name (_HID, EisaId ("PNP0C0F"))
@@ -61,7 +61,7 @@ DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001)
 				Return (0x0B)
  			}
 
-			/* Current Resources - return irq set up in BIOS */  
+			/* Current Resources - return irq set up in BIOS */
 			Method (_CRS, 0, NotSerialized)
 			{
 				Name (CRSP, ResourceTemplate () {
@@ -79,7 +79,7 @@ DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001)
                 	}
 			/* Possible Resources - return the range of irqs
  			 * we are using for PCI - only here to keep Linux ACPI
-			 * happy 
+			 * happy
 			 */
 			Method (_PRS, 0, NotSerialized)
 			{
@@ -99,16 +99,16 @@ DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001)
                 	}
 			/* Set Resources - dummy function to keep Linux ACPI happy
                          * Linux is more than happy not to tinker with irq
-			 * assignments as long as the CRS and STA functions 
+			 * assignments as long as the CRS and STA functions
 			 * return good values
 			 */
 			Method (_SRS, 1, NotSerialized ) {}
 			/* Disable - dummy function to keep Linux ACPI happy */
 			Method (_DIS, 0, NotSerialized ) {}
- 
-		} // End of LNKA 
 
-		/* Define how interrupt Link B is plumbed in */ 
+		} // End of LNKA
+
+		/* Define how interrupt Link B is plumbed in */
 		Device (LNKB)
 		{
 			Name (_HID, EisaId ("PNP0C0F"))
@@ -120,7 +120,7 @@ DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001)
 				Return (0x0B)
  			}
 
-			/* Current Resources - return irq set up in BIOS */  
+			/* Current Resources - return irq set up in BIOS */
 			Method (_CRS, 0, NotSerialized)
 			{
 				Name (CRSP, ResourceTemplate () {
@@ -138,7 +138,7 @@ DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001)
                 	}
 			/* Possible Resources - return the range of irqs
  			 * we are using for PCI - only here to keep Linux ACPI
-			 * happy 
+			 * happy
 			 */
 			Method (_PRS, 0, NotSerialized)
 			{
@@ -159,16 +159,16 @@ DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001)
 
 			/* Set Resources - dummy function to keep Linux ACPI happy
                          * Linux is more than happy not to tinker with irq
-			 * assignments as long as the CRS and STA functions 
+			 * assignments as long as the CRS and STA functions
 			 * return good values
 			 */
 			Method (_SRS, 1, NotSerialized ) {}
 			/* Disable - dummy function to keep Linux ACPI happy */
 			Method (_DIS, 0, NotSerialized ) {}
- 
+
 		} // End of LNKB
 
-		/* Define how interrupt Link C is plumbed in */ 
+		/* Define how interrupt Link C is plumbed in */
 		Device (LNKC)
 		{
 			Name (_HID, EisaId ("PNP0C0F"))
@@ -180,7 +180,7 @@ DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001)
 				Return (0x0B)
  			}
 
-			/* Current Resources - return irq set up in BIOS */  
+			/* Current Resources - return irq set up in BIOS */
 			Method (_CRS, 0, NotSerialized)
 			{
 				Name (CRSP, ResourceTemplate () {
@@ -198,7 +198,7 @@ DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001)
                 	}
 			/* Possible Resources - return the range of irqs
  			 * we are using for PCI - only here to keep Linux ACPI
-			 * happy 
+			 * happy
 			 */
 			Method (_PRS, 0, NotSerialized)
 			{
@@ -219,16 +219,16 @@ DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001)
 
 			/* Set Resources - dummy function to keep Linux ACPI happy
                          * Linux is more than happy not to tinker with irq
-			 * assignments as long as the CRS and STA functions 
+			 * assignments as long as the CRS and STA functions
 			 * return good values
 			 */
 			Method (_SRS, 1, NotSerialized ) {}
 			/* Disable - dummy function to keep Linux ACPI happy */
 			Method (_DIS, 0, NotSerialized ) {}
- 
+
 		} // End of LNKC
 
-		/* Define how interrupt Link D is plumbed in */ 
+		/* Define how interrupt Link D is plumbed in */
 		Device (LNKD)
 		{
 			Name (_HID, EisaId ("PNP0C0F"))
@@ -240,7 +240,7 @@ DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001)
 				Return (0x0B)
  			}
 
-			/* Current Resources - return irq set up in BIOS */  
+			/* Current Resources - return irq set up in BIOS */
 			Method (_CRS, 0, NotSerialized)
 			{
 				Name (CRSP, ResourceTemplate () {
@@ -258,7 +258,7 @@ DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001)
                 	}
 			/* Possible Resources - return the range of irqs
  			 * we are using for PCI - only here to keep Linux ACPI
-			 * happy 
+			 * happy
 			 */
 			Method (_PRS, 0, NotSerialized)
 			{
@@ -279,14 +279,14 @@ DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001)
 
 			/* Set Resources - dummy function to keep Linux ACPI happy
                          * Linux is more than happy not to tinker with irq
-			 * assignments as long as the CRS and STA functions 
+			 * assignments as long as the CRS and STA functions
 			 * return good values
 			 */
 			Method (_SRS, 1, NotSerialized ) {}
 			/* Disable - dummy function to keep Linux ACPI happy */
 			Method (_DIS, 0, NotSerialized ) {}
- 
-		} // End of LNKD 
+
+		} // End of LNKD
 
 		/* PCI Root Bridge */
 		Device (PCI0)
diff --git a/src/mainboard/via/vt8454c/romstage.c b/src/mainboard/via/vt8454c/romstage.c
index dea85bc234..1a1efbf8f6 100644
--- a/src/mainboard/via/vt8454c/romstage.c
+++ b/src/mainboard/via/vt8454c/romstage.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
@@ -49,7 +49,7 @@ static void enable_mainboard_devices(void)
 	if (dev == PCI_DEV_INVALID) {
 		die("LPC bridge not found!!!\n");
 	}
-	// Disable GP3 
+	// Disable GP3
 	pci_write_config8(dev, 0x98, 0x00);
 
 	// Disable mc97